245 	writew(I2C_SOFT_RST, i2c->base + OFFSET_SOFTRESET);  in mtk_i2c_init_hw()
249 		writew(I2C_IO_CONFIG_PUSH_PULL, i2c->base + OFFSET_IO_CONFIG);  in mtk_i2c_init_hw()
251 		writew(I2C_IO_CONFIG_OPEN_DRAIN, i2c->base + OFFSET_IO_CONFIG);  in mtk_i2c_init_hw()
254 		writew(I2C_DCM_DISABLE, i2c->base + OFFSET_DCM_EN);  in mtk_i2c_init_hw()
256 	writew(i2c->timing_reg, i2c->base + OFFSET_TIMING);  in mtk_i2c_init_hw()
257 	writew(i2c->high_speed_reg, i2c->base + OFFSET_HS);  in mtk_i2c_init_hw()
261 		writew(I2C_CONTROL_WRAPPER, i2c->base + OFFSET_PATH_DIR);  in mtk_i2c_init_hw()
265 	writew(control_reg, i2c->base + OFFSET_CONTROL);  in mtk_i2c_init_hw()
266 	writew(I2C_DELAY_LEN, i2c->base + OFFSET_DELAY_LEN);  in mtk_i2c_init_hw()
389 	writew(control_reg, i2c->base + OFFSET_CONTROL);  in mtk_i2c_do_transfer()
393 		writew(I2C_ST_START_CON, i2c->base + OFFSET_EXT_CONF);  in mtk_i2c_do_transfer()
395 		writew(I2C_FS_START_CON, i2c->base + OFFSET_EXT_CONF);  in mtk_i2c_do_transfer()
401 	writew(addr_reg, i2c->base + OFFSET_SLAVE_ADDR);  in mtk_i2c_do_transfer()
404 	writew(restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
406 	writew(I2C_FIFO_ADDR_CLR, i2c->base + OFFSET_FIFO_ADDR_CLR);  in mtk_i2c_do_transfer()
409 	writew(restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
414 		writew(msgs->len | ((msgs + 1)->len) << 8,  in mtk_i2c_do_transfer()
416 		writew(I2C_WRRD_TRANAC_VALUE, i2c->base + OFFSET_TRANSAC_LEN);  in mtk_i2c_do_transfer()
418 		writew(msgs->len, i2c->base + OFFSET_TRANSFER_LEN);  in mtk_i2c_do_transfer()
419 		writew(num, i2c->base + OFFSET_TRANSAC_LEN);  in mtk_i2c_do_transfer()
471 	writew(start_reg, i2c->base + OFFSET_START);  in mtk_i2c_do_transfer()
477 	writew(~(restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
566 	writew(intr_stat, i2c->base + OFFSET_INTR_STAT);  in mtk_i2c_irq()