251 	writel(readl(i2c->regs + HSI2C_INT_STATUS),  in exynos5_i2c_clr_pend_irq()
340 		writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_HS1);  in exynos5_i2c_set_timing()
341 		writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_HS2);  in exynos5_i2c_set_timing()
342 		writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3);  in exynos5_i2c_set_timing()
344 		writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_FS1);  in exynos5_i2c_set_timing()
345 		writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_FS2);  in exynos5_i2c_set_timing()
346 		writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_FS3);  in exynos5_i2c_set_timing()
348 	writel(i2c_timing_sla, i2c->regs + HSI2C_TIMING_SLA);  in exynos5_i2c_set_timing()
386 	writel(i2c_timeout, i2c->regs + HSI2C_TIMEOUT);  in exynos5_i2c_init()
388 	writel((HSI2C_FUNC_MODE_I2C | HSI2C_MASTER),  in exynos5_i2c_init()
390 	writel(HSI2C_TRAILING_COUNT, i2c->regs + HSI2C_TRAILIG_CTL);  in exynos5_i2c_init()
393 		writel(HSI2C_MASTER_ID(MASTER_ID(i2c->adap.nr)),  in exynos5_i2c_init()
398 	writel(i2c_conf | HSI2C_AUTO_MODE, i2c->regs + HSI2C_CONF);  in exynos5_i2c_init()
408 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);  in exynos5_i2c_reset()
412 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);  in exynos5_i2c_reset()
439 	writel(int_status, i2c->regs + HSI2C_INT_STATUS);  in exynos5_i2c_irq()
510 			writel(byte, i2c->regs + HSI2C_TX_DATA);  in exynos5_i2c_irq()
519 		writel(0, i2c->regs + HSI2C_INT_ENABLE);  in exynos5_i2c_irq()
604 	writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR);  in exynos5_i2c_message_start()
606 	writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL);  in exynos5_i2c_message_start()
607 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);  in exynos5_i2c_message_start()
614 	writel(int_en, i2c->regs + HSI2C_INT_ENABLE);  in exynos5_i2c_message_start()
620 	writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);  in exynos5_i2c_message_start()