100 	void __iomem *base;  member
115 	int_en = readl(idev->base + MST_INT_ENABLE);  in i2c_int_disable()
116 	writel(int_en & ~mask, idev->base + MST_INT_ENABLE);  in i2c_int_disable()
123 	int_en = readl(idev->base + MST_INT_ENABLE);  in i2c_int_enable()
124 	writel(int_en | mask, idev->base + MST_INT_ENABLE);  in i2c_int_enable()
149 	writel(0x01, idev->base + SOFT_RESET);  in axxia_i2c_init()
151 	while (readl(idev->base + SOFT_RESET) & 1) {  in axxia_i2c_init()
159 	writel(0x1, idev->base + GLOBAL_CONTROL);  in axxia_i2c_init()
174 	writel(t_high, idev->base + SCL_HIGH_PERIOD);  in axxia_i2c_init()
176 	writel(t_low, idev->base + SCL_LOW_PERIOD);  in axxia_i2c_init()
178 	writel(t_setup, idev->base + SDA_SETUP_TIME);  in axxia_i2c_init()
180 	writel(ns_to_clk(300, clk_mhz), idev->base + SDA_HOLD_TIME);  in axxia_i2c_init()
182 	writel(ns_to_clk(50, clk_mhz), idev->base + SPIKE_FLTR_LEN);  in axxia_i2c_init()
197 	writel(prescale, idev->base + TIMER_CLOCK_DIV);  in axxia_i2c_init()
199 	writel(WT_EN | WT_VALUE(tmo_clk), idev->base + WAIT_TIMER_CONTROL);  in axxia_i2c_init()
205 	writel(0x01, idev->base + INTERRUPT_ENABLE);  in axxia_i2c_init()
232 	size_t rx_fifo_avail = readl(idev->base + MST_RX_FIFO);  in axxia_i2c_empty_rx_fifo()
236 		int c = readl(idev->base + MST_DATA);  in axxia_i2c_empty_rx_fifo()
249 			writel(msg->len, idev->base + MST_RX_XFER);  in axxia_i2c_empty_rx_fifo()
264 	size_t tx_fifo_avail = FIFO_SIZE - readl(idev->base + MST_TX_FIFO);  in axxia_i2c_fill_tx_fifo()
269 		writel(msg->buf[idev->msg_xfrd++], idev->base + MST_DATA);  in axxia_i2c_fill_tx_fifo()
279 	if (!(readl(idev->base + INTERRUPT_STATUS) & INT_MST))  in axxia_i2c_isr()
283 	status = readl(idev->base + MST_INT_STATUS);  in axxia_i2c_isr()
322 			readl(idev->base + MST_RX_BYTES_XFRD),  in axxia_i2c_isr()
323 			readl(idev->base + MST_RX_XFER),  in axxia_i2c_isr()
324 			readl(idev->base + MST_TX_BYTES_XFRD),  in axxia_i2c_isr()
325 			readl(idev->base + MST_TX_XFER));  in axxia_i2c_isr()
331 	writel(INT_MST, idev->base + INTERRUPT_STATUS);  in axxia_i2c_isr()
375 	writel(rx_xfer, idev->base + MST_RX_XFER);  in axxia_i2c_xfer_msg()
376 	writel(tx_xfer, idev->base + MST_TX_XFER);  in axxia_i2c_xfer_msg()
377 	writel(addr_1, idev->base + MST_ADDR_1);  in axxia_i2c_xfer_msg()
378 	writel(addr_2, idev->base + MST_ADDR_2);  in axxia_i2c_xfer_msg()
386 	writel(CMD_MANUAL, idev->base + MST_COMMAND);  in axxia_i2c_xfer_msg()
395 	if (readl(idev->base + MST_COMMAND) & CMD_BUSY)  in axxia_i2c_xfer_msg()
418 	writel(0xb, idev->base + MST_COMMAND);  in axxia_i2c_stop()
426 	if (readl(idev->base + MST_COMMAND) & CMD_BUSY)  in axxia_i2c_stop()
451 	return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SCLS);  in axxia_i2c_get_scl()
460 	tmp = readl(idev->base + I2C_BUS_MONITOR) & BM_SDAC;  in axxia_i2c_set_scl()
463 	writel(tmp, idev->base + I2C_BUS_MONITOR);  in axxia_i2c_set_scl()
470 	return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SDAS);  in axxia_i2c_get_sda()
502 	void __iomem *base;  in axxia_i2c_probe()  local
511 	base = devm_ioremap_resource(&pdev->dev, res);  in axxia_i2c_probe()
512 	if (IS_ERR(base))  in axxia_i2c_probe()
513 		return PTR_ERR(base);  in axxia_i2c_probe()
527 	idev->base = base;  in axxia_i2c_probe()