Lines Matching refs:drvdata
48 struct etmv4_drvdata *drvdata = (struct etmv4_drvdata *)info; in etm4_os_unlock() local
51 writel_relaxed(0x0, drvdata->base + TRCOSLAR); in etm4_os_unlock()
68 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm4_trace_id() local
72 if (!drvdata->enable) in etm4_trace_id()
73 return drvdata->trcid; in etm4_trace_id()
75 pm_runtime_get_sync(drvdata->dev); in etm4_trace_id()
76 spin_lock_irqsave(&drvdata->spinlock, flags); in etm4_trace_id()
78 CS_UNLOCK(drvdata->base); in etm4_trace_id()
79 trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR); in etm4_trace_id()
81 CS_LOCK(drvdata->base); in etm4_trace_id()
83 spin_unlock_irqrestore(&drvdata->spinlock, flags); in etm4_trace_id()
84 pm_runtime_put(drvdata->dev); in etm4_trace_id()
92 struct etmv4_drvdata *drvdata = info; in etm4_enable_hw() local
94 CS_UNLOCK(drvdata->base); in etm4_enable_hw()
96 etm4_os_unlock(drvdata); in etm4_enable_hw()
99 writel_relaxed(0, drvdata->base + TRCPRGCTLR); in etm4_enable_hw()
102 if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) in etm4_enable_hw()
103 dev_err(drvdata->dev, in etm4_enable_hw()
107 writel_relaxed(drvdata->pe_sel, drvdata->base + TRCPROCSELR); in etm4_enable_hw()
108 writel_relaxed(drvdata->cfg, drvdata->base + TRCCONFIGR); in etm4_enable_hw()
110 writel_relaxed(0x0, drvdata->base + TRCAUXCTLR); in etm4_enable_hw()
111 writel_relaxed(drvdata->eventctrl0, drvdata->base + TRCEVENTCTL0R); in etm4_enable_hw()
112 writel_relaxed(drvdata->eventctrl1, drvdata->base + TRCEVENTCTL1R); in etm4_enable_hw()
113 writel_relaxed(drvdata->stall_ctrl, drvdata->base + TRCSTALLCTLR); in etm4_enable_hw()
114 writel_relaxed(drvdata->ts_ctrl, drvdata->base + TRCTSCTLR); in etm4_enable_hw()
115 writel_relaxed(drvdata->syncfreq, drvdata->base + TRCSYNCPR); in etm4_enable_hw()
116 writel_relaxed(drvdata->ccctlr, drvdata->base + TRCCCCTLR); in etm4_enable_hw()
117 writel_relaxed(drvdata->bb_ctrl, drvdata->base + TRCBBCTLR); in etm4_enable_hw()
118 writel_relaxed(drvdata->trcid, drvdata->base + TRCTRACEIDR); in etm4_enable_hw()
119 writel_relaxed(drvdata->vinst_ctrl, drvdata->base + TRCVICTLR); in etm4_enable_hw()
120 writel_relaxed(drvdata->viiectlr, drvdata->base + TRCVIIECTLR); in etm4_enable_hw()
121 writel_relaxed(drvdata->vissctlr, in etm4_enable_hw()
122 drvdata->base + TRCVISSCTLR); in etm4_enable_hw()
123 writel_relaxed(drvdata->vipcssctlr, in etm4_enable_hw()
124 drvdata->base + TRCVIPCSSCTLR); in etm4_enable_hw()
125 for (i = 0; i < drvdata->nrseqstate - 1; i++) in etm4_enable_hw()
126 writel_relaxed(drvdata->seq_ctrl[i], in etm4_enable_hw()
127 drvdata->base + TRCSEQEVRn(i)); in etm4_enable_hw()
128 writel_relaxed(drvdata->seq_rst, drvdata->base + TRCSEQRSTEVR); in etm4_enable_hw()
129 writel_relaxed(drvdata->seq_state, drvdata->base + TRCSEQSTR); in etm4_enable_hw()
130 writel_relaxed(drvdata->ext_inp, drvdata->base + TRCEXTINSELR); in etm4_enable_hw()
131 for (i = 0; i < drvdata->nr_cntr; i++) { in etm4_enable_hw()
132 writel_relaxed(drvdata->cntrldvr[i], in etm4_enable_hw()
133 drvdata->base + TRCCNTRLDVRn(i)); in etm4_enable_hw()
134 writel_relaxed(drvdata->cntr_ctrl[i], in etm4_enable_hw()
135 drvdata->base + TRCCNTCTLRn(i)); in etm4_enable_hw()
136 writel_relaxed(drvdata->cntr_val[i], in etm4_enable_hw()
137 drvdata->base + TRCCNTVRn(i)); in etm4_enable_hw()
141 for (i = 2; i < drvdata->nr_resource * 2; i++) in etm4_enable_hw()
142 writel_relaxed(drvdata->res_ctrl[i], in etm4_enable_hw()
143 drvdata->base + TRCRSCTLRn(i)); in etm4_enable_hw()
145 for (i = 0; i < drvdata->nr_ss_cmp; i++) { in etm4_enable_hw()
146 writel_relaxed(drvdata->ss_ctrl[i], in etm4_enable_hw()
147 drvdata->base + TRCSSCCRn(i)); in etm4_enable_hw()
148 writel_relaxed(drvdata->ss_status[i], in etm4_enable_hw()
149 drvdata->base + TRCSSCSRn(i)); in etm4_enable_hw()
150 writel_relaxed(drvdata->ss_pe_cmp[i], in etm4_enable_hw()
151 drvdata->base + TRCSSPCICRn(i)); in etm4_enable_hw()
153 for (i = 0; i < drvdata->nr_addr_cmp; i++) { in etm4_enable_hw()
154 writeq_relaxed(drvdata->addr_val[i], in etm4_enable_hw()
155 drvdata->base + TRCACVRn(i)); in etm4_enable_hw()
156 writeq_relaxed(drvdata->addr_acc[i], in etm4_enable_hw()
157 drvdata->base + TRCACATRn(i)); in etm4_enable_hw()
159 for (i = 0; i < drvdata->numcidc; i++) in etm4_enable_hw()
160 writeq_relaxed(drvdata->ctxid_pid[i], in etm4_enable_hw()
161 drvdata->base + TRCCIDCVRn(i)); in etm4_enable_hw()
162 writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0); in etm4_enable_hw()
163 writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1); in etm4_enable_hw()
165 for (i = 0; i < drvdata->numvmidc; i++) in etm4_enable_hw()
166 writeq_relaxed(drvdata->vmid_val[i], in etm4_enable_hw()
167 drvdata->base + TRCVMIDCVRn(i)); in etm4_enable_hw()
168 writel_relaxed(drvdata->vmid_mask0, drvdata->base + TRCVMIDCCTLR0); in etm4_enable_hw()
169 writel_relaxed(drvdata->vmid_mask1, drvdata->base + TRCVMIDCCTLR1); in etm4_enable_hw()
172 writel_relaxed(1, drvdata->base + TRCPRGCTLR); in etm4_enable_hw()
175 if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0)) in etm4_enable_hw()
176 dev_err(drvdata->dev, in etm4_enable_hw()
180 CS_LOCK(drvdata->base); in etm4_enable_hw()
182 dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); in etm4_enable_hw()
187 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm4_enable() local
190 pm_runtime_get_sync(drvdata->dev); in etm4_enable()
191 spin_lock(&drvdata->spinlock); in etm4_enable()
197 ret = smp_call_function_single(drvdata->cpu, in etm4_enable()
198 etm4_enable_hw, drvdata, 1); in etm4_enable()
201 drvdata->enable = true; in etm4_enable()
202 drvdata->sticky_enable = true; in etm4_enable()
204 spin_unlock(&drvdata->spinlock); in etm4_enable()
206 dev_info(drvdata->dev, "ETM tracing enabled\n"); in etm4_enable()
209 spin_unlock(&drvdata->spinlock); in etm4_enable()
210 pm_runtime_put(drvdata->dev); in etm4_enable()
217 struct etmv4_drvdata *drvdata = info; in etm4_disable_hw() local
219 CS_UNLOCK(drvdata->base); in etm4_disable_hw()
221 control = readl_relaxed(drvdata->base + TRCPRGCTLR); in etm4_disable_hw()
229 writel_relaxed(control, drvdata->base + TRCPRGCTLR); in etm4_disable_hw()
231 CS_LOCK(drvdata->base); in etm4_disable_hw()
233 dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); in etm4_disable_hw()
238 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm4_disable() local
247 spin_lock(&drvdata->spinlock); in etm4_disable()
253 smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1); in etm4_disable()
254 drvdata->enable = false; in etm4_disable()
256 spin_unlock(&drvdata->spinlock); in etm4_disable()
259 pm_runtime_put(drvdata->dev); in etm4_disable()
261 dev_info(drvdata->dev, "ETM tracing disabled\n"); in etm4_disable()
274 static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude) in etm4_set_mode_exclude() argument
276 u8 idx = drvdata->addr_idx; in etm4_set_mode_exclude()
282 if (BMVAL(drvdata->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) { in etm4_set_mode_exclude()
291 if (drvdata->addr_type[idx] != ETM_ADDR_TYPE_RANGE || in etm4_set_mode_exclude()
292 drvdata->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE) in etm4_set_mode_exclude()
300 drvdata->viiectlr |= BIT(idx / 2 + 16); in etm4_set_mode_exclude()
301 drvdata->viiectlr &= ~BIT(idx / 2); in etm4_set_mode_exclude()
307 drvdata->viiectlr |= BIT(idx / 2); in etm4_set_mode_exclude()
308 drvdata->viiectlr &= ~BIT(idx / 2 + 16); in etm4_set_mode_exclude()
319 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_pe_cmp_show() local
321 val = drvdata->nr_pe_cmp; in nr_pe_cmp_show()
331 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_addr_cmp_show() local
333 val = drvdata->nr_addr_cmp; in nr_addr_cmp_show()
343 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_cntr_show() local
345 val = drvdata->nr_cntr; in nr_cntr_show()
355 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_ext_inp_show() local
357 val = drvdata->nr_ext_inp; in nr_ext_inp_show()
367 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in numcidc_show() local
369 val = drvdata->numcidc; in numcidc_show()
379 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in numvmidc_show() local
381 val = drvdata->numvmidc; in numvmidc_show()
391 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nrseqstate_show() local
393 val = drvdata->nrseqstate; in nrseqstate_show()
403 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_resource_show() local
405 val = drvdata->nr_resource; in nr_resource_show()
415 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_ss_cmp_show() local
417 val = drvdata->nr_ss_cmp; in nr_ss_cmp_show()
428 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in reset_store() local
433 spin_lock(&drvdata->spinlock); in reset_store()
435 drvdata->mode = 0x0; in reset_store()
438 drvdata->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE); in reset_store()
439 drvdata->cfg &= ~(BIT(1) | BIT(2)); in reset_store()
442 drvdata->mode &= ~(ETM_MODE_DATA_TRACE_ADDR | in reset_store()
444 drvdata->cfg &= ~(BIT(16) | BIT(17)); in reset_store()
447 drvdata->eventctrl0 = 0x0; in reset_store()
448 drvdata->eventctrl1 = 0x0; in reset_store()
451 drvdata->ts_ctrl = 0x0; in reset_store()
454 drvdata->stall_ctrl = 0x0; in reset_store()
457 if (drvdata->syncpr == false) in reset_store()
458 drvdata->syncfreq = 0x8; in reset_store()
465 drvdata->vinst_ctrl |= BIT(0); in reset_store()
466 if (drvdata->nr_addr_cmp == true) { in reset_store()
467 drvdata->mode |= ETM_MODE_VIEWINST_STARTSTOP; in reset_store()
469 drvdata->vinst_ctrl |= BIT(9); in reset_store()
473 drvdata->viiectlr = 0x0; in reset_store()
476 drvdata->vissctlr = 0x0; in reset_store()
479 for (i = 0; i < drvdata->nrseqstate-1; i++) in reset_store()
480 drvdata->seq_ctrl[i] = 0x0; in reset_store()
481 drvdata->seq_rst = 0x0; in reset_store()
482 drvdata->seq_state = 0x0; in reset_store()
485 drvdata->ext_inp = 0x0; in reset_store()
487 drvdata->cntr_idx = 0x0; in reset_store()
488 for (i = 0; i < drvdata->nr_cntr; i++) { in reset_store()
489 drvdata->cntrldvr[i] = 0x0; in reset_store()
490 drvdata->cntr_ctrl[i] = 0x0; in reset_store()
491 drvdata->cntr_val[i] = 0x0; in reset_store()
495 drvdata->res_idx = 0x2; in reset_store()
496 for (i = 2; i < drvdata->nr_resource * 2; i++) in reset_store()
497 drvdata->res_ctrl[i] = 0x0; in reset_store()
499 for (i = 0; i < drvdata->nr_ss_cmp; i++) { in reset_store()
500 drvdata->ss_ctrl[i] = 0x0; in reset_store()
501 drvdata->ss_pe_cmp[i] = 0x0; in reset_store()
504 drvdata->addr_idx = 0x0; in reset_store()
505 for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { in reset_store()
506 drvdata->addr_val[i] = 0x0; in reset_store()
507 drvdata->addr_acc[i] = 0x0; in reset_store()
508 drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE; in reset_store()
511 drvdata->ctxid_idx = 0x0; in reset_store()
512 for (i = 0; i < drvdata->numcidc; i++) { in reset_store()
513 drvdata->ctxid_pid[i] = 0x0; in reset_store()
514 drvdata->ctxid_vpid[i] = 0x0; in reset_store()
517 drvdata->ctxid_mask0 = 0x0; in reset_store()
518 drvdata->ctxid_mask1 = 0x0; in reset_store()
520 drvdata->vmid_idx = 0x0; in reset_store()
521 for (i = 0; i < drvdata->numvmidc; i++) in reset_store()
522 drvdata->vmid_val[i] = 0x0; in reset_store()
523 drvdata->vmid_mask0 = 0x0; in reset_store()
524 drvdata->vmid_mask1 = 0x0; in reset_store()
526 drvdata->trcid = drvdata->cpu + 1; in reset_store()
527 spin_unlock(&drvdata->spinlock); in reset_store()
537 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in mode_show() local
539 val = drvdata->mode; in mode_show()
548 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in mode_store() local
553 spin_lock(&drvdata->spinlock); in mode_store()
554 drvdata->mode = val & ETMv4_MODE_ALL; in mode_store()
556 if (drvdata->mode & ETM_MODE_EXCLUDE) in mode_store()
557 etm4_set_mode_exclude(drvdata, true); in mode_store()
559 etm4_set_mode_exclude(drvdata, false); in mode_store()
561 if (drvdata->instrp0 == true) { in mode_store()
563 drvdata->cfg &= ~(BIT(1) | BIT(2)); in mode_store()
564 if (drvdata->mode & ETM_MODE_LOAD) in mode_store()
566 drvdata->cfg |= BIT(1); in mode_store()
567 if (drvdata->mode & ETM_MODE_STORE) in mode_store()
569 drvdata->cfg |= BIT(2); in mode_store()
570 if (drvdata->mode & ETM_MODE_LOAD_STORE) in mode_store()
575 drvdata->cfg |= BIT(1) | BIT(2); in mode_store()
579 if ((drvdata->mode & ETM_MODE_BB) && (drvdata->trcbb == true)) in mode_store()
580 drvdata->cfg |= BIT(3); in mode_store()
582 drvdata->cfg &= ~BIT(3); in mode_store()
585 if ((drvdata->mode & ETMv4_MODE_CYCACC) && in mode_store()
586 (drvdata->trccci == true)) in mode_store()
587 drvdata->cfg |= BIT(4); in mode_store()
589 drvdata->cfg &= ~BIT(4); in mode_store()
592 if ((drvdata->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size)) in mode_store()
593 drvdata->cfg |= BIT(6); in mode_store()
595 drvdata->cfg &= ~BIT(6); in mode_store()
597 if ((drvdata->mode & ETM_MODE_VMID) && (drvdata->vmid_size)) in mode_store()
598 drvdata->cfg |= BIT(7); in mode_store()
600 drvdata->cfg &= ~BIT(7); in mode_store()
603 mode = ETM_MODE_COND(drvdata->mode); in mode_store()
604 if (drvdata->trccond == true) { in mode_store()
605 drvdata->cfg &= ~(BIT(8) | BIT(9) | BIT(10)); in mode_store()
606 drvdata->cfg |= mode << 8; in mode_store()
610 if ((drvdata->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size)) in mode_store()
611 drvdata->cfg |= BIT(11); in mode_store()
613 drvdata->cfg &= ~BIT(11); in mode_store()
616 if ((drvdata->mode & ETM_MODE_RETURNSTACK) && in mode_store()
617 (drvdata->retstack == true)) in mode_store()
618 drvdata->cfg |= BIT(12); in mode_store()
620 drvdata->cfg &= ~BIT(12); in mode_store()
623 mode = ETM_MODE_QELEM(drvdata->mode); in mode_store()
625 drvdata->cfg &= ~(BIT(13) | BIT(14)); in mode_store()
627 if ((mode & BIT(0)) && (drvdata->q_support & BIT(0))) in mode_store()
628 drvdata->cfg |= BIT(13); in mode_store()
633 if ((mode & BIT(1)) && (drvdata->q_support & BIT(1))) in mode_store()
634 drvdata->cfg |= BIT(14); in mode_store()
637 if ((drvdata->mode & ETM_MODE_ATB_TRIGGER) && in mode_store()
638 (drvdata->atbtrig == true)) in mode_store()
639 drvdata->eventctrl1 |= BIT(11); in mode_store()
641 drvdata->eventctrl1 &= ~BIT(11); in mode_store()
644 if ((drvdata->mode & ETM_MODE_LPOVERRIDE) && in mode_store()
645 (drvdata->lpoverride == true)) in mode_store()
646 drvdata->eventctrl1 |= BIT(12); in mode_store()
648 drvdata->eventctrl1 &= ~BIT(12); in mode_store()
651 if (drvdata->mode & ETM_MODE_ISTALL_EN) in mode_store()
652 drvdata->stall_ctrl |= BIT(8); in mode_store()
654 drvdata->stall_ctrl &= ~BIT(8); in mode_store()
657 if (drvdata->mode & ETM_MODE_INSTPRIO) in mode_store()
658 drvdata->stall_ctrl |= BIT(10); in mode_store()
660 drvdata->stall_ctrl &= ~BIT(10); in mode_store()
663 if ((drvdata->mode & ETM_MODE_NOOVERFLOW) && in mode_store()
664 (drvdata->nooverflow == true)) in mode_store()
665 drvdata->stall_ctrl |= BIT(13); in mode_store()
667 drvdata->stall_ctrl &= ~BIT(13); in mode_store()
670 if (drvdata->mode & ETM_MODE_VIEWINST_STARTSTOP) in mode_store()
671 drvdata->vinst_ctrl |= BIT(9); in mode_store()
673 drvdata->vinst_ctrl &= ~BIT(9); in mode_store()
676 if (drvdata->mode & ETM_MODE_TRACE_RESET) in mode_store()
677 drvdata->vinst_ctrl |= BIT(10); in mode_store()
679 drvdata->vinst_ctrl &= ~BIT(10); in mode_store()
682 if ((drvdata->mode & ETM_MODE_TRACE_ERR) && in mode_store()
683 (drvdata->trc_error == true)) in mode_store()
684 drvdata->vinst_ctrl |= BIT(11); in mode_store()
686 drvdata->vinst_ctrl &= ~BIT(11); in mode_store()
688 spin_unlock(&drvdata->spinlock); in mode_store()
698 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in pe_show() local
700 val = drvdata->pe_sel; in pe_show()
709 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in pe_store() local
714 spin_lock(&drvdata->spinlock); in pe_store()
715 if (val > drvdata->nr_pe) { in pe_store()
716 spin_unlock(&drvdata->spinlock); in pe_store()
720 drvdata->pe_sel = val; in pe_store()
721 spin_unlock(&drvdata->spinlock); in pe_store()
731 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_show() local
733 val = drvdata->eventctrl0; in event_show()
742 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_store() local
747 spin_lock(&drvdata->spinlock); in event_store()
748 switch (drvdata->nr_event) { in event_store()
751 drvdata->eventctrl0 = val & 0xFF; in event_store()
755 drvdata->eventctrl0 = val & 0xFFFF; in event_store()
759 drvdata->eventctrl0 = val & 0xFFFFFF; in event_store()
763 drvdata->eventctrl0 = val; in event_store()
768 spin_unlock(&drvdata->spinlock); in event_store()
778 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_instren_show() local
780 val = BMVAL(drvdata->eventctrl1, 0, 3); in event_instren_show()
789 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_instren_store() local
794 spin_lock(&drvdata->spinlock); in event_instren_store()
796 drvdata->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3)); in event_instren_store()
797 switch (drvdata->nr_event) { in event_instren_store()
800 drvdata->eventctrl1 |= val & BIT(1); in event_instren_store()
804 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1)); in event_instren_store()
808 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2)); in event_instren_store()
812 drvdata->eventctrl1 |= val & 0xF; in event_instren_store()
817 spin_unlock(&drvdata->spinlock); in event_instren_store()
827 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_ts_show() local
829 val = drvdata->ts_ctrl; in event_ts_show()
838 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_ts_store() local
842 if (!drvdata->ts_size) in event_ts_store()
845 drvdata->ts_ctrl = val & ETMv4_EVENT_MASK; in event_ts_store()
855 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in syncfreq_show() local
857 val = drvdata->syncfreq; in syncfreq_show()
866 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in syncfreq_store() local
870 if (drvdata->syncpr == true) in syncfreq_store()
873 drvdata->syncfreq = val & ETMv4_SYNC_MASK; in syncfreq_store()
883 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cyc_threshold_show() local
885 val = drvdata->ccctlr; in cyc_threshold_show()
894 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cyc_threshold_store() local
898 if (val < drvdata->ccitmin) in cyc_threshold_store()
901 drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK; in cyc_threshold_store()
911 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in bb_ctrl_show() local
913 val = drvdata->bb_ctrl; in bb_ctrl_show()
922 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in bb_ctrl_store() local
926 if (drvdata->trcbb == false) in bb_ctrl_store()
928 if (!drvdata->nr_addr_cmp) in bb_ctrl_store()
934 if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp) in bb_ctrl_store()
937 drvdata->bb_ctrl = val; in bb_ctrl_store()
947 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_vinst_show() local
949 val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK; in event_vinst_show()
958 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in event_vinst_store() local
963 spin_lock(&drvdata->spinlock); in event_vinst_store()
965 drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK; in event_vinst_store()
966 drvdata->vinst_ctrl |= val; in event_vinst_store()
967 spin_unlock(&drvdata->spinlock); in event_vinst_store()
977 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in s_exlevel_vinst_show() local
979 val = BMVAL(drvdata->vinst_ctrl, 16, 19); in s_exlevel_vinst_show()
988 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in s_exlevel_vinst_store() local
993 spin_lock(&drvdata->spinlock); in s_exlevel_vinst_store()
995 drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19)); in s_exlevel_vinst_store()
997 val &= drvdata->s_ex_level; in s_exlevel_vinst_store()
998 drvdata->vinst_ctrl |= (val << 16); in s_exlevel_vinst_store()
999 spin_unlock(&drvdata->spinlock); in s_exlevel_vinst_store()
1009 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ns_exlevel_vinst_show() local
1012 val = BMVAL(drvdata->vinst_ctrl, 20, 23); in ns_exlevel_vinst_show()
1021 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ns_exlevel_vinst_store() local
1026 spin_lock(&drvdata->spinlock); in ns_exlevel_vinst_store()
1028 drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22)); in ns_exlevel_vinst_store()
1030 val &= drvdata->ns_ex_level; in ns_exlevel_vinst_store()
1031 drvdata->vinst_ctrl |= (val << 20); in ns_exlevel_vinst_store()
1032 spin_unlock(&drvdata->spinlock); in ns_exlevel_vinst_store()
1042 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_idx_show() local
1044 val = drvdata->addr_idx; in addr_idx_show()
1053 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_idx_store() local
1057 if (val >= drvdata->nr_addr_cmp * 2) in addr_idx_store()
1064 spin_lock(&drvdata->spinlock); in addr_idx_store()
1065 drvdata->addr_idx = val; in addr_idx_store()
1066 spin_unlock(&drvdata->spinlock); in addr_idx_store()
1077 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_instdatatype_show() local
1079 spin_lock(&drvdata->spinlock); in addr_instdatatype_show()
1080 idx = drvdata->addr_idx; in addr_instdatatype_show()
1081 val = BMVAL(drvdata->addr_acc[idx], 0, 1); in addr_instdatatype_show()
1087 spin_unlock(&drvdata->spinlock); in addr_instdatatype_show()
1097 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_instdatatype_store() local
1104 spin_lock(&drvdata->spinlock); in addr_instdatatype_store()
1105 idx = drvdata->addr_idx; in addr_instdatatype_store()
1108 drvdata->addr_acc[idx] &= ~(BIT(0) | BIT(1)); in addr_instdatatype_store()
1110 spin_unlock(&drvdata->spinlock); in addr_instdatatype_store()
1121 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_single_show() local
1123 idx = drvdata->addr_idx; in addr_single_show()
1124 spin_lock(&drvdata->spinlock); in addr_single_show()
1125 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_single_show()
1126 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { in addr_single_show()
1127 spin_unlock(&drvdata->spinlock); in addr_single_show()
1130 val = (unsigned long)drvdata->addr_val[idx]; in addr_single_show()
1131 spin_unlock(&drvdata->spinlock); in addr_single_show()
1141 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_single_store() local
1146 spin_lock(&drvdata->spinlock); in addr_single_store()
1147 idx = drvdata->addr_idx; in addr_single_store()
1148 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_single_store()
1149 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { in addr_single_store()
1150 spin_unlock(&drvdata->spinlock); in addr_single_store()
1154 drvdata->addr_val[idx] = (u64)val; in addr_single_store()
1155 drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE; in addr_single_store()
1156 spin_unlock(&drvdata->spinlock); in addr_single_store()
1167 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_range_show() local
1169 spin_lock(&drvdata->spinlock); in addr_range_show()
1170 idx = drvdata->addr_idx; in addr_range_show()
1172 spin_unlock(&drvdata->spinlock); in addr_range_show()
1175 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && in addr_range_show()
1176 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || in addr_range_show()
1177 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && in addr_range_show()
1178 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { in addr_range_show()
1179 spin_unlock(&drvdata->spinlock); in addr_range_show()
1183 val1 = (unsigned long)drvdata->addr_val[idx]; in addr_range_show()
1184 val2 = (unsigned long)drvdata->addr_val[idx + 1]; in addr_range_show()
1185 spin_unlock(&drvdata->spinlock); in addr_range_show()
1195 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_range_store() local
1203 spin_lock(&drvdata->spinlock); in addr_range_store()
1204 idx = drvdata->addr_idx; in addr_range_store()
1206 spin_unlock(&drvdata->spinlock); in addr_range_store()
1210 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && in addr_range_store()
1211 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || in addr_range_store()
1212 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && in addr_range_store()
1213 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { in addr_range_store()
1214 spin_unlock(&drvdata->spinlock); in addr_range_store()
1218 drvdata->addr_val[idx] = (u64)val1; in addr_range_store()
1219 drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE; in addr_range_store()
1220 drvdata->addr_val[idx + 1] = (u64)val2; in addr_range_store()
1221 drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE; in addr_range_store()
1226 if (drvdata->mode & ETM_MODE_EXCLUDE) in addr_range_store()
1227 etm4_set_mode_exclude(drvdata, true); in addr_range_store()
1229 etm4_set_mode_exclude(drvdata, false); in addr_range_store()
1231 spin_unlock(&drvdata->spinlock); in addr_range_store()
1242 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_start_show() local
1244 spin_lock(&drvdata->spinlock); in addr_start_show()
1245 idx = drvdata->addr_idx; in addr_start_show()
1247 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_start_show()
1248 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { in addr_start_show()
1249 spin_unlock(&drvdata->spinlock); in addr_start_show()
1253 val = (unsigned long)drvdata->addr_val[idx]; in addr_start_show()
1254 spin_unlock(&drvdata->spinlock); in addr_start_show()
1264 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_start_store() local
1269 spin_lock(&drvdata->spinlock); in addr_start_store()
1270 idx = drvdata->addr_idx; in addr_start_store()
1271 if (!drvdata->nr_addr_cmp) { in addr_start_store()
1272 spin_unlock(&drvdata->spinlock); in addr_start_store()
1275 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_start_store()
1276 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { in addr_start_store()
1277 spin_unlock(&drvdata->spinlock); in addr_start_store()
1281 drvdata->addr_val[idx] = (u64)val; in addr_start_store()
1282 drvdata->addr_type[idx] = ETM_ADDR_TYPE_START; in addr_start_store()
1283 drvdata->vissctlr |= BIT(idx); in addr_start_store()
1285 drvdata->vinst_ctrl |= BIT(9); in addr_start_store()
1286 spin_unlock(&drvdata->spinlock); in addr_start_store()
1297 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_stop_show() local
1299 spin_lock(&drvdata->spinlock); in addr_stop_show()
1300 idx = drvdata->addr_idx; in addr_stop_show()
1302 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_stop_show()
1303 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { in addr_stop_show()
1304 spin_unlock(&drvdata->spinlock); in addr_stop_show()
1308 val = (unsigned long)drvdata->addr_val[idx]; in addr_stop_show()
1309 spin_unlock(&drvdata->spinlock); in addr_stop_show()
1319 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_stop_store() local
1324 spin_lock(&drvdata->spinlock); in addr_stop_store()
1325 idx = drvdata->addr_idx; in addr_stop_store()
1326 if (!drvdata->nr_addr_cmp) { in addr_stop_store()
1327 spin_unlock(&drvdata->spinlock); in addr_stop_store()
1330 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_stop_store()
1331 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { in addr_stop_store()
1332 spin_unlock(&drvdata->spinlock); in addr_stop_store()
1336 drvdata->addr_val[idx] = (u64)val; in addr_stop_store()
1337 drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP; in addr_stop_store()
1338 drvdata->vissctlr |= BIT(idx + 16); in addr_stop_store()
1340 drvdata->vinst_ctrl |= BIT(9); in addr_stop_store()
1341 spin_unlock(&drvdata->spinlock); in addr_stop_store()
1352 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_ctxtype_show() local
1354 spin_lock(&drvdata->spinlock); in addr_ctxtype_show()
1355 idx = drvdata->addr_idx; in addr_ctxtype_show()
1357 val = BMVAL(drvdata->addr_acc[idx], 2, 3); in addr_ctxtype_show()
1361 spin_unlock(&drvdata->spinlock); in addr_ctxtype_show()
1371 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_ctxtype_store() local
1378 spin_lock(&drvdata->spinlock); in addr_ctxtype_store()
1379 idx = drvdata->addr_idx; in addr_ctxtype_store()
1382 drvdata->addr_acc[idx] &= ~(BIT(2) | BIT(3)); in addr_ctxtype_store()
1385 if (drvdata->numcidc) { in addr_ctxtype_store()
1386 drvdata->addr_acc[idx] |= BIT(2); in addr_ctxtype_store()
1387 drvdata->addr_acc[idx] &= ~BIT(3); in addr_ctxtype_store()
1391 if (drvdata->numvmidc) { in addr_ctxtype_store()
1392 drvdata->addr_acc[idx] &= ~BIT(2); in addr_ctxtype_store()
1393 drvdata->addr_acc[idx] |= BIT(3); in addr_ctxtype_store()
1400 if (drvdata->numcidc) in addr_ctxtype_store()
1401 drvdata->addr_acc[idx] |= BIT(2); in addr_ctxtype_store()
1402 if (drvdata->numvmidc) in addr_ctxtype_store()
1403 drvdata->addr_acc[idx] |= BIT(3); in addr_ctxtype_store()
1405 spin_unlock(&drvdata->spinlock); in addr_ctxtype_store()
1416 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_context_show() local
1418 spin_lock(&drvdata->spinlock); in addr_context_show()
1419 idx = drvdata->addr_idx; in addr_context_show()
1421 val = BMVAL(drvdata->addr_acc[idx], 4, 6); in addr_context_show()
1422 spin_unlock(&drvdata->spinlock); in addr_context_show()
1432 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_context_store() local
1436 if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1)) in addr_context_store()
1438 if (val >= (drvdata->numcidc >= drvdata->numvmidc ? in addr_context_store()
1439 drvdata->numcidc : drvdata->numvmidc)) in addr_context_store()
1442 spin_lock(&drvdata->spinlock); in addr_context_store()
1443 idx = drvdata->addr_idx; in addr_context_store()
1445 drvdata->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6)); in addr_context_store()
1446 drvdata->addr_acc[idx] |= (val << 4); in addr_context_store()
1447 spin_unlock(&drvdata->spinlock); in addr_context_store()
1457 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_idx_show() local
1459 val = drvdata->seq_idx; in seq_idx_show()
1468 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_idx_store() local
1472 if (val >= drvdata->nrseqstate - 1) in seq_idx_store()
1479 spin_lock(&drvdata->spinlock); in seq_idx_store()
1480 drvdata->seq_idx = val; in seq_idx_store()
1481 spin_unlock(&drvdata->spinlock); in seq_idx_store()
1491 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_state_show() local
1493 val = drvdata->seq_state; in seq_state_show()
1502 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_state_store() local
1506 if (val >= drvdata->nrseqstate) in seq_state_store()
1509 drvdata->seq_state = val; in seq_state_store()
1520 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_event_show() local
1522 spin_lock(&drvdata->spinlock); in seq_event_show()
1523 idx = drvdata->seq_idx; in seq_event_show()
1524 val = drvdata->seq_ctrl[idx]; in seq_event_show()
1525 spin_unlock(&drvdata->spinlock); in seq_event_show()
1535 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_event_store() local
1540 spin_lock(&drvdata->spinlock); in seq_event_store()
1541 idx = drvdata->seq_idx; in seq_event_store()
1543 drvdata->seq_ctrl[idx] = val & 0xFF; in seq_event_store()
1544 spin_unlock(&drvdata->spinlock); in seq_event_store()
1554 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_reset_event_show() local
1556 val = drvdata->seq_rst; in seq_reset_event_show()
1565 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_reset_event_store() local
1569 if (!(drvdata->nrseqstate)) in seq_reset_event_store()
1572 drvdata->seq_rst = val & ETMv4_EVENT_MASK; in seq_reset_event_store()
1582 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_idx_show() local
1584 val = drvdata->cntr_idx; in cntr_idx_show()
1593 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_idx_store() local
1597 if (val >= drvdata->nr_cntr) in cntr_idx_store()
1604 spin_lock(&drvdata->spinlock); in cntr_idx_store()
1605 drvdata->cntr_idx = val; in cntr_idx_store()
1606 spin_unlock(&drvdata->spinlock); in cntr_idx_store()
1617 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntrldvr_show() local
1619 spin_lock(&drvdata->spinlock); in cntrldvr_show()
1620 idx = drvdata->cntr_idx; in cntrldvr_show()
1621 val = drvdata->cntrldvr[idx]; in cntrldvr_show()
1622 spin_unlock(&drvdata->spinlock); in cntrldvr_show()
1632 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntrldvr_store() local
1639 spin_lock(&drvdata->spinlock); in cntrldvr_store()
1640 idx = drvdata->cntr_idx; in cntrldvr_store()
1641 drvdata->cntrldvr[idx] = val; in cntrldvr_store()
1642 spin_unlock(&drvdata->spinlock); in cntrldvr_store()
1653 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_val_show() local
1655 spin_lock(&drvdata->spinlock); in cntr_val_show()
1656 idx = drvdata->cntr_idx; in cntr_val_show()
1657 val = drvdata->cntr_val[idx]; in cntr_val_show()
1658 spin_unlock(&drvdata->spinlock); in cntr_val_show()
1668 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_val_store() local
1675 spin_lock(&drvdata->spinlock); in cntr_val_store()
1676 idx = drvdata->cntr_idx; in cntr_val_store()
1677 drvdata->cntr_val[idx] = val; in cntr_val_store()
1678 spin_unlock(&drvdata->spinlock); in cntr_val_store()
1689 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_ctrl_show() local
1691 spin_lock(&drvdata->spinlock); in cntr_ctrl_show()
1692 idx = drvdata->cntr_idx; in cntr_ctrl_show()
1693 val = drvdata->cntr_ctrl[idx]; in cntr_ctrl_show()
1694 spin_unlock(&drvdata->spinlock); in cntr_ctrl_show()
1704 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_ctrl_store() local
1709 spin_lock(&drvdata->spinlock); in cntr_ctrl_store()
1710 idx = drvdata->cntr_idx; in cntr_ctrl_store()
1711 drvdata->cntr_ctrl[idx] = val; in cntr_ctrl_store()
1712 spin_unlock(&drvdata->spinlock); in cntr_ctrl_store()
1722 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in res_idx_show() local
1724 val = drvdata->res_idx; in res_idx_show()
1733 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in res_idx_store() local
1738 if (val < 2 || val >= drvdata->nr_resource * 2) in res_idx_store()
1745 spin_lock(&drvdata->spinlock); in res_idx_store()
1746 drvdata->res_idx = val; in res_idx_store()
1747 spin_unlock(&drvdata->spinlock); in res_idx_store()
1758 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in res_ctrl_show() local
1760 spin_lock(&drvdata->spinlock); in res_ctrl_show()
1761 idx = drvdata->res_idx; in res_ctrl_show()
1762 val = drvdata->res_ctrl[idx]; in res_ctrl_show()
1763 spin_unlock(&drvdata->spinlock); in res_ctrl_show()
1773 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in res_ctrl_store() local
1778 spin_lock(&drvdata->spinlock); in res_ctrl_store()
1779 idx = drvdata->res_idx; in res_ctrl_store()
1784 drvdata->res_ctrl[idx] = val; in res_ctrl_store()
1785 spin_unlock(&drvdata->spinlock); in res_ctrl_store()
1795 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_idx_show() local
1797 val = drvdata->ctxid_idx; in ctxid_idx_show()
1806 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_idx_store() local
1810 if (val >= drvdata->numcidc) in ctxid_idx_store()
1817 spin_lock(&drvdata->spinlock); in ctxid_idx_store()
1818 drvdata->ctxid_idx = val; in ctxid_idx_store()
1819 spin_unlock(&drvdata->spinlock); in ctxid_idx_store()
1830 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_pid_show() local
1832 spin_lock(&drvdata->spinlock); in ctxid_pid_show()
1833 idx = drvdata->ctxid_idx; in ctxid_pid_show()
1834 val = (unsigned long)drvdata->ctxid_vpid[idx]; in ctxid_pid_show()
1835 spin_unlock(&drvdata->spinlock); in ctxid_pid_show()
1845 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_pid_store() local
1852 if (!drvdata->ctxid_size || !drvdata->numcidc) in ctxid_pid_store()
1859 spin_lock(&drvdata->spinlock); in ctxid_pid_store()
1860 idx = drvdata->ctxid_idx; in ctxid_pid_store()
1861 drvdata->ctxid_pid[idx] = (u64)pid; in ctxid_pid_store()
1862 drvdata->ctxid_vpid[idx] = (u64)vpid; in ctxid_pid_store()
1863 spin_unlock(&drvdata->spinlock); in ctxid_pid_store()
1873 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_masks_show() local
1875 spin_lock(&drvdata->spinlock); in ctxid_masks_show()
1876 val1 = drvdata->ctxid_mask0; in ctxid_masks_show()
1877 val2 = drvdata->ctxid_mask1; in ctxid_masks_show()
1878 spin_unlock(&drvdata->spinlock); in ctxid_masks_show()
1888 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_masks_store() local
1895 if (!drvdata->ctxid_size || !drvdata->numcidc) in ctxid_masks_store()
1900 spin_lock(&drvdata->spinlock); in ctxid_masks_store()
1905 switch (drvdata->numcidc) { in ctxid_masks_store()
1908 drvdata->ctxid_mask0 = val1 & 0xFF; in ctxid_masks_store()
1912 drvdata->ctxid_mask0 = val1 & 0xFFFF; in ctxid_masks_store()
1916 drvdata->ctxid_mask0 = val1 & 0xFFFFFF; in ctxid_masks_store()
1920 drvdata->ctxid_mask0 = val1; in ctxid_masks_store()
1924 drvdata->ctxid_mask0 = val1; in ctxid_masks_store()
1925 drvdata->ctxid_mask1 = val2 & 0xFF; in ctxid_masks_store()
1929 drvdata->ctxid_mask0 = val1; in ctxid_masks_store()
1930 drvdata->ctxid_mask1 = val2 & 0xFFFF; in ctxid_masks_store()
1934 drvdata->ctxid_mask0 = val1; in ctxid_masks_store()
1935 drvdata->ctxid_mask1 = val2 & 0xFFFFFF; in ctxid_masks_store()
1939 drvdata->ctxid_mask0 = val1; in ctxid_masks_store()
1940 drvdata->ctxid_mask1 = val2; in ctxid_masks_store()
1951 mask = drvdata->ctxid_mask0; in ctxid_masks_store()
1952 for (i = 0; i < drvdata->numcidc; i++) { in ctxid_masks_store()
1961 drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8)); in ctxid_masks_store()
1967 mask = drvdata->ctxid_mask1; in ctxid_masks_store()
1972 spin_unlock(&drvdata->spinlock); in ctxid_masks_store()
1982 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_idx_show() local
1984 val = drvdata->vmid_idx; in vmid_idx_show()
1993 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_idx_store() local
1997 if (val >= drvdata->numvmidc) in vmid_idx_store()
2004 spin_lock(&drvdata->spinlock); in vmid_idx_store()
2005 drvdata->vmid_idx = val; in vmid_idx_store()
2006 spin_unlock(&drvdata->spinlock); in vmid_idx_store()
2016 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_val_show() local
2018 val = (unsigned long)drvdata->vmid_val[drvdata->vmid_idx]; in vmid_val_show()
2027 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_val_store() local
2033 if (!drvdata->vmid_size || !drvdata->numvmidc) in vmid_val_store()
2038 spin_lock(&drvdata->spinlock); in vmid_val_store()
2039 drvdata->vmid_val[drvdata->vmid_idx] = (u64)val; in vmid_val_store()
2040 spin_unlock(&drvdata->spinlock); in vmid_val_store()
2049 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_masks_show() local
2051 spin_lock(&drvdata->spinlock); in vmid_masks_show()
2052 val1 = drvdata->vmid_mask0; in vmid_masks_show()
2053 val2 = drvdata->vmid_mask1; in vmid_masks_show()
2054 spin_unlock(&drvdata->spinlock); in vmid_masks_show()
2064 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in vmid_masks_store() local
2069 if (!drvdata->vmid_size || !drvdata->numvmidc) in vmid_masks_store()
2074 spin_lock(&drvdata->spinlock); in vmid_masks_store()
2080 switch (drvdata->numvmidc) { in vmid_masks_store()
2083 drvdata->vmid_mask0 = val1 & 0xFF; in vmid_masks_store()
2087 drvdata->vmid_mask0 = val1 & 0xFFFF; in vmid_masks_store()
2091 drvdata->vmid_mask0 = val1 & 0xFFFFFF; in vmid_masks_store()
2095 drvdata->vmid_mask0 = val1; in vmid_masks_store()
2099 drvdata->vmid_mask0 = val1; in vmid_masks_store()
2100 drvdata->vmid_mask1 = val2 & 0xFF; in vmid_masks_store()
2104 drvdata->vmid_mask0 = val1; in vmid_masks_store()
2105 drvdata->vmid_mask1 = val2 & 0xFFFF; in vmid_masks_store()
2109 drvdata->vmid_mask0 = val1; in vmid_masks_store()
2110 drvdata->vmid_mask1 = val2 & 0xFFFFFF; in vmid_masks_store()
2114 drvdata->vmid_mask0 = val1; in vmid_masks_store()
2115 drvdata->vmid_mask1 = val2; in vmid_masks_store()
2127 mask = drvdata->vmid_mask0; in vmid_masks_store()
2128 for (i = 0; i < drvdata->numvmidc; i++) { in vmid_masks_store()
2137 drvdata->vmid_val[i] &= ~(0xFF << (j * 8)); in vmid_masks_store()
2143 mask = drvdata->vmid_mask1; in vmid_masks_store()
2147 spin_unlock(&drvdata->spinlock); in vmid_masks_store()
2156 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); in cpu_show() local
2158 val = drvdata->cpu; in cpu_show()
2218 struct etmv4_drvdata *drvdata = dev_get_drvdata(_dev->parent); \
2220 readl_relaxed(drvdata->base + offset)); \
2311 struct etmv4_drvdata *drvdata = info; in etm4_init_arch_data() local
2313 CS_UNLOCK(drvdata->base); in etm4_init_arch_data()
2316 etmidr0 = readl_relaxed(drvdata->base + TRCIDR0); in etm4_init_arch_data()
2320 drvdata->instrp0 = true; in etm4_init_arch_data()
2322 drvdata->instrp0 = false; in etm4_init_arch_data()
2326 drvdata->trcbb = true; in etm4_init_arch_data()
2328 drvdata->trcbb = false; in etm4_init_arch_data()
2332 drvdata->trccond = true; in etm4_init_arch_data()
2334 drvdata->trccond = false; in etm4_init_arch_data()
2338 drvdata->trccci = true; in etm4_init_arch_data()
2340 drvdata->trccci = false; in etm4_init_arch_data()
2344 drvdata->retstack = true; in etm4_init_arch_data()
2346 drvdata->retstack = false; in etm4_init_arch_data()
2349 drvdata->nr_event = BMVAL(etmidr0, 10, 11); in etm4_init_arch_data()
2351 drvdata->q_support = BMVAL(etmidr0, 15, 16); in etm4_init_arch_data()
2353 drvdata->ts_size = BMVAL(etmidr0, 24, 28); in etm4_init_arch_data()
2356 etmidr1 = readl_relaxed(drvdata->base + TRCIDR1); in etm4_init_arch_data()
2361 drvdata->arch = BMVAL(etmidr1, 4, 11); in etm4_init_arch_data()
2364 etmidr2 = readl_relaxed(drvdata->base + TRCIDR2); in etm4_init_arch_data()
2366 drvdata->ctxid_size = BMVAL(etmidr2, 5, 9); in etm4_init_arch_data()
2368 drvdata->vmid_size = BMVAL(etmidr2, 10, 14); in etm4_init_arch_data()
2370 drvdata->ccsize = BMVAL(etmidr2, 25, 28); in etm4_init_arch_data()
2372 etmidr3 = readl_relaxed(drvdata->base + TRCIDR3); in etm4_init_arch_data()
2374 drvdata->ccitmin = BMVAL(etmidr3, 0, 11); in etm4_init_arch_data()
2376 drvdata->s_ex_level = BMVAL(etmidr3, 16, 19); in etm4_init_arch_data()
2378 drvdata->ns_ex_level = BMVAL(etmidr3, 20, 23); in etm4_init_arch_data()
2385 drvdata->trc_error = true; in etm4_init_arch_data()
2387 drvdata->trc_error = false; in etm4_init_arch_data()
2391 drvdata->syncpr = true; in etm4_init_arch_data()
2393 drvdata->syncpr = false; in etm4_init_arch_data()
2397 drvdata->stallctl = true; in etm4_init_arch_data()
2399 drvdata->stallctl = false; in etm4_init_arch_data()
2403 drvdata->sysstall = true; in etm4_init_arch_data()
2405 drvdata->sysstall = false; in etm4_init_arch_data()
2408 drvdata->nr_pe = BMVAL(etmidr3, 28, 30); in etm4_init_arch_data()
2412 drvdata->nooverflow = true; in etm4_init_arch_data()
2414 drvdata->nooverflow = false; in etm4_init_arch_data()
2417 etmidr4 = readl_relaxed(drvdata->base + TRCIDR4); in etm4_init_arch_data()
2419 drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3); in etm4_init_arch_data()
2421 drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15); in etm4_init_arch_data()
2428 drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1; in etm4_init_arch_data()
2433 drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23); in etm4_init_arch_data()
2435 drvdata->numcidc = BMVAL(etmidr4, 24, 27); in etm4_init_arch_data()
2437 drvdata->numvmidc = BMVAL(etmidr4, 28, 31); in etm4_init_arch_data()
2439 etmidr5 = readl_relaxed(drvdata->base + TRCIDR5); in etm4_init_arch_data()
2441 drvdata->nr_ext_inp = BMVAL(etmidr5, 0, 8); in etm4_init_arch_data()
2443 drvdata->trcid_size = BMVAL(etmidr5, 16, 21); in etm4_init_arch_data()
2446 drvdata->atbtrig = true; in etm4_init_arch_data()
2448 drvdata->atbtrig = false; in etm4_init_arch_data()
2454 drvdata->lpoverride = true; in etm4_init_arch_data()
2456 drvdata->lpoverride = false; in etm4_init_arch_data()
2458 drvdata->nrseqstate = BMVAL(etmidr5, 25, 27); in etm4_init_arch_data()
2460 drvdata->nr_cntr = BMVAL(etmidr5, 28, 30); in etm4_init_arch_data()
2461 CS_LOCK(drvdata->base); in etm4_init_arch_data()
2464 static void etm4_init_default_data(struct etmv4_drvdata *drvdata) in etm4_init_default_data() argument
2468 drvdata->pe_sel = 0x0; in etm4_init_default_data()
2469 drvdata->cfg = (ETMv4_MODE_CTXID | ETM_MODE_VMID | in etm4_init_default_data()
2473 drvdata->eventctrl0 = 0x0; in etm4_init_default_data()
2474 drvdata->eventctrl1 = 0x0; in etm4_init_default_data()
2477 drvdata->stall_ctrl = 0x0; in etm4_init_default_data()
2480 drvdata->ts_ctrl = 0x0; in etm4_init_default_data()
2483 if (drvdata->syncpr == false) in etm4_init_default_data()
2484 drvdata->syncfreq = 0xC; in etm4_init_default_data()
2490 drvdata->vinst_ctrl |= BIT(0); in etm4_init_default_data()
2492 if (drvdata->nr_addr_cmp) in etm4_init_default_data()
2493 drvdata->vinst_ctrl |= BIT(9); in etm4_init_default_data()
2496 drvdata->viiectlr = 0x0; in etm4_init_default_data()
2498 drvdata->vissctlr = 0x0; in etm4_init_default_data()
2501 for (i = 0; i < drvdata->nrseqstate-1; i++) in etm4_init_default_data()
2502 drvdata->seq_ctrl[i] = 0x0; in etm4_init_default_data()
2503 drvdata->seq_rst = 0x0; in etm4_init_default_data()
2504 drvdata->seq_state = 0x0; in etm4_init_default_data()
2507 drvdata->ext_inp = 0x0; in etm4_init_default_data()
2509 for (i = 0; i < drvdata->nr_cntr; i++) { in etm4_init_default_data()
2510 drvdata->cntrldvr[i] = 0x0; in etm4_init_default_data()
2511 drvdata->cntr_ctrl[i] = 0x0; in etm4_init_default_data()
2512 drvdata->cntr_val[i] = 0x0; in etm4_init_default_data()
2516 drvdata->res_idx = 0x2; in etm4_init_default_data()
2517 for (i = 2; i < drvdata->nr_resource * 2; i++) in etm4_init_default_data()
2518 drvdata->res_ctrl[i] = 0x0; in etm4_init_default_data()
2520 for (i = 0; i < drvdata->nr_ss_cmp; i++) { in etm4_init_default_data()
2521 drvdata->ss_ctrl[i] = 0x0; in etm4_init_default_data()
2522 drvdata->ss_pe_cmp[i] = 0x0; in etm4_init_default_data()
2525 if (drvdata->nr_addr_cmp >= 1) { in etm4_init_default_data()
2526 drvdata->addr_val[0] = (unsigned long)_stext; in etm4_init_default_data()
2527 drvdata->addr_val[1] = (unsigned long)_etext; in etm4_init_default_data()
2528 drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE; in etm4_init_default_data()
2529 drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE; in etm4_init_default_data()
2532 for (i = 0; i < drvdata->numcidc; i++) { in etm4_init_default_data()
2533 drvdata->ctxid_pid[i] = 0x0; in etm4_init_default_data()
2534 drvdata->ctxid_vpid[i] = 0x0; in etm4_init_default_data()
2537 drvdata->ctxid_mask0 = 0x0; in etm4_init_default_data()
2538 drvdata->ctxid_mask1 = 0x0; in etm4_init_default_data()
2540 for (i = 0; i < drvdata->numvmidc; i++) in etm4_init_default_data()
2541 drvdata->vmid_val[i] = 0x0; in etm4_init_default_data()
2542 drvdata->vmid_mask0 = 0x0; in etm4_init_default_data()
2543 drvdata->vmid_mask1 = 0x0; in etm4_init_default_data()
2550 drvdata->trcid = 0x20 + drvdata->cpu; in etm4_init_default_data()
2601 struct etmv4_drvdata *drvdata; in etm4_probe() local
2610 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); in etm4_probe()
2611 if (!drvdata) in etm4_probe()
2621 drvdata->dev = &adev->dev; in etm4_probe()
2622 dev_set_drvdata(dev, drvdata); in etm4_probe()
2629 drvdata->base = base; in etm4_probe()
2631 spin_lock_init(&drvdata->spinlock); in etm4_probe()
2633 drvdata->cpu = pdata ? pdata->cpu : 0; in etm4_probe()
2636 etmdrvdata[drvdata->cpu] = drvdata; in etm4_probe()
2638 if (!smp_call_function_single(drvdata->cpu, etm4_os_unlock, drvdata, 1)) in etm4_probe()
2639 drvdata->os_unlock = true; in etm4_probe()
2641 if (smp_call_function_single(drvdata->cpu, in etm4_probe()
2642 etm4_init_arch_data, drvdata, 1)) in etm4_probe()
2650 if (etm4_arch_supported(drvdata->arch) == false) { in etm4_probe()
2654 etm4_init_default_data(drvdata); in etm4_probe()
2664 drvdata->csdev = coresight_register(desc); in etm4_probe()
2665 if (IS_ERR(drvdata->csdev)) { in etm4_probe()
2666 ret = PTR_ERR(drvdata->csdev); in etm4_probe()
2673 coresight_enable(drvdata->csdev); in etm4_probe()
2674 drvdata->boot_enable = true; in etm4_probe()
2689 struct etmv4_drvdata *drvdata = amba_get_drvdata(adev); in etm4_remove() local
2691 coresight_unregister(drvdata->csdev); in etm4_remove()