267 	writel_relaxed(d_addr, gdd + SSI_GDD_CDSA_REG(lch));  in ssi_start_dma()
268 	writel_relaxed(s_addr, gdd + SSI_GDD_CSSA_REG(lch));  in ssi_start_dma()
275 	writel_relaxed(tmp, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);  in ssi_start_dma()
463 	writel_relaxed(SSI_MODE_SLEEP, sst + SSI_SST_MODE_REG);  in ssi_setup()
464 	writel_relaxed(SSI_MODE_SLEEP, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
468 	writel_relaxed(31, sst + SSI_SST_FRAMESIZE_REG);  in ssi_setup()
469 	writel_relaxed(div, sst + SSI_SST_DIVISOR_REG);  in ssi_setup()
470 	writel_relaxed(cl->tx_cfg.num_hw_channels, sst + SSI_SST_CHANNELS_REG);  in ssi_setup()
471 	writel_relaxed(cl->tx_cfg.arb_mode, sst + SSI_SST_ARBMODE_REG);  in ssi_setup()
472 	writel_relaxed(cl->tx_cfg.mode, sst + SSI_SST_MODE_REG);  in ssi_setup()
474 	writel_relaxed(31, ssr + SSI_SSR_FRAMESIZE_REG);  in ssi_setup()
475 	writel_relaxed(cl->rx_cfg.num_hw_channels, ssr + SSI_SSR_CHANNELS_REG);  in ssi_setup()
476 	writel_relaxed(0, ssr + SSI_SSR_TIMEOUT_REG);  in ssi_setup()
481 	writel_relaxed(cl->rx_cfg.mode, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
528 	writel_relaxed(0, sst + SSI_SST_BUFSTATE_REG);  in ssi_flush()
529 	writel_relaxed(0, sst + SSI_SST_TXSTATE_REG);  in ssi_flush()
531 	writel_relaxed(0, ssr + SSI_SSR_RXSTATE_REG);  in ssi_flush()
532 	writel_relaxed(0, ssr + SSI_SSR_BUFSTATE_REG);  in ssi_flush()
535 	writel_relaxed(err, ssr + SSI_SSR_ERRORACK_REG);  in ssi_flush()
537 	writel_relaxed(0, ssr + SSI_SSR_BREAK_REG);  in ssi_flush()
539 	writel_relaxed(0, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));  in ssi_flush()
540 	writel_relaxed(0xffffff00,  in ssi_flush()
542 	writel_relaxed(0, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);  in ssi_flush()
671 	writel_relaxed(tmp, omap_port->sst_base + SSI_SST_BUFSTATE_REG);  in ssi_cleanup_queues()
675 	writel_relaxed(tmp, omap_port->ssr_base + SSI_SSR_BUFSTATE_REG);  in ssi_cleanup_queues()
679 	writel_relaxed(tmp, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));  in ssi_cleanup_queues()
680 	writel_relaxed(status, omap_ssi->sys +  in ssi_cleanup_queues()
710 	writel_relaxed(tmp, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);  in ssi_cleanup_gdd()
792 	writel_relaxed(tmp, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);  in ssi_error()
798 	writel_relaxed(tmp, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));  in ssi_error()
800 	writel_relaxed(err, omap_port->ssr_base + SSI_SSR_ERRORACK_REG);  in ssi_error()
801 	writel_relaxed(SSI_ERROROCCURED,  in ssi_error()
834 	writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));  in ssi_break_complete()
835 	writel_relaxed(0, omap_port->ssr_base + SSI_SSR_BREAK_REG);  in ssi_break_complete()
905 	writel_relaxed(reg, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));  in ssi_pio_complete()
906 	writel_relaxed(val, omap_ssi->sys + SSI_MPU_STATUS_REG(port->num, 0));  in ssi_pio_complete()
1282 	writel_relaxed(omap_port->sys_mpu_enable,  in ssi_restore_port_ctx()
1287 	writel_relaxed(omap_port->sst.frame_size, base + SSI_SST_FRAMESIZE_REG);  in ssi_restore_port_ctx()
1288 	writel_relaxed(omap_port->sst.channels, base + SSI_SST_CHANNELS_REG);  in ssi_restore_port_ctx()
1289 	writel_relaxed(omap_port->sst.arb_mode, base + SSI_SST_ARBMODE_REG);  in ssi_restore_port_ctx()
1293 	writel_relaxed(omap_port->ssr.frame_size, base + SSI_SSR_FRAMESIZE_REG);  in ssi_restore_port_ctx()
1294 	writel_relaxed(omap_port->ssr.channels, base + SSI_SSR_CHANNELS_REG);  in ssi_restore_port_ctx()
1295 	writel_relaxed(omap_port->ssr.timeout, base + SSI_SSR_TIMEOUT_REG);  in ssi_restore_port_ctx()
1304 	writel_relaxed(omap_port->sst.mode,  in ssi_restore_port_mode()
1306 	writel_relaxed(omap_port->ssr.mode,  in ssi_restore_port_mode()
1316 	writel_relaxed(omap_port->sst.divisor,  in ssi_restore_divisor()