347 		if (omap_port->ssr.mode != SSI_MODE_FRAME) {  in ssi_async_break()
385 		BUG_ON(msg->channel >= omap_port->ssr.channels);  in ssi_async()
446 	void __iomem *ssr = omap_port->ssr_base;  in ssi_setup()  local
464 	writel_relaxed(SSI_MODE_SLEEP, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
466 	val = readl(ssr + SSI_SSR_MODE_REG);  in ssi_setup()
474 	writel_relaxed(31, ssr + SSI_SSR_FRAMESIZE_REG);  in ssi_setup()
475 	writel_relaxed(cl->rx_cfg.num_hw_channels, ssr + SSI_SSR_CHANNELS_REG);  in ssi_setup()
476 	writel_relaxed(0, ssr + SSI_SSR_TIMEOUT_REG);  in ssi_setup()
478 	if ((omap_port->ssr.mode == SSI_MODE_FRAME) &&  in ssi_setup()
481 	writel_relaxed(cl->rx_cfg.mode, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
492 	omap_port->ssr.frame_size = 31;  in ssi_setup()
493 	omap_port->ssr.timeout = 0;  in ssi_setup()
494 	omap_port->ssr.channels = cl->rx_cfg.num_hw_channels;  in ssi_setup()
495 	omap_port->ssr.mode = cl->rx_cfg.mode;  in ssi_setup()
511 	void __iomem *ssr = omap_port->ssr_base;  in ssi_flush()  local
531 	writel_relaxed(0, ssr + SSI_SSR_RXSTATE_REG);  in ssi_flush()
532 	writel_relaxed(0, ssr + SSI_SSR_BUFSTATE_REG);  in ssi_flush()
534 	err = readl(ssr + SSI_SSR_ERROR_REG);  in ssi_flush()
535 	writel_relaxed(err, ssr + SSI_SSR_ERRORACK_REG);  in ssi_flush()
537 	writel_relaxed(0, ssr + SSI_SSR_BREAK_REG);  in ssi_flush()
751 		omap_port->ssr.mode = SSI_MODE_SLEEP;  in ssi_release()
1293 	writel_relaxed(omap_port->ssr.frame_size, base + SSI_SSR_FRAMESIZE_REG);  in ssi_restore_port_ctx()
1294 	writel_relaxed(omap_port->ssr.channels, base + SSI_SSR_CHANNELS_REG);  in ssi_restore_port_ctx()
1295 	writel_relaxed(omap_port->ssr.timeout, base + SSI_SSR_TIMEOUT_REG);  in ssi_restore_port_ctx()
1306 	writel_relaxed(omap_port->ssr.mode,  in ssi_restore_port_mode()