212 		struct ipu_di_signal_cfg *sig)  in ipu_di_sync_config_interlaced()  argument
214 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_interlaced()
215 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_interlaced()
216 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_interlaced()
217 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_interlaced()
229 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_interlaced()
236 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_interlaced()
249 			.offset_count = (sig->mode.vsync_len +  in ipu_di_sync_config_interlaced()
250 					 sig->mode.vback_porch) / 2,  in ipu_di_sync_config_interlaced()
252 			.repeat_count = sig->mode.vactive / 2,  in ipu_di_sync_config_interlaced()
257 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_interlaced()
258 					sig->mode.hback_porch,  in ipu_di_sync_config_interlaced()
260 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_interlaced()
275 		struct ipu_di_signal_cfg *sig, int div)  in ipu_di_sync_config_noninterlaced()  argument
277 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
278 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_noninterlaced()
279 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
280 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_noninterlaced()
290 			.offset_count = div * sig->v_to_h_sync,  in ipu_di_sync_config_noninterlaced()
294 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
301 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
305 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
306 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
308 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
313 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
314 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
316 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
341 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
342 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
344 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
350 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
354 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
358 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
359 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
361 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
371 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
376 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
380 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
389 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
396 	if (sig->hsync_pin == 2 && sig->vsync_pin == 3)  in ipu_di_sync_config_noninterlaced()
403 	const struct ipu_di_signal_cfg *sig)  in ipu_di_config_clock()  argument
409 	if (sig->clkflags & IPU_DI_CLKMODE_EXT) {  in ipu_di_config_clock()
417 		if (sig->clkflags & IPU_DI_CLKMODE_SYNC) {  in ipu_di_config_clock()
437 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
440 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
457 		div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);  in ipu_di_config_clock()
461 		error = rate / (sig->mode.pixelclock / 1000);  in ipu_di_config_clock()
477 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
480 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
507 		sig->mode.pixelclock,  in ipu_di_config_clock()
566 int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)  in ipu_di_init_sync_panel()  argument
573 		di->id, sig->mode.hactive, sig->mode.vactive);  in ipu_di_init_sync_panel()
575 	if ((sig->mode.vsync_len == 0) || (sig->mode.hsync_len == 0))  in ipu_di_init_sync_panel()
581 		sig->mode.pixelclock);  in ipu_di_init_sync_panel()
585 	ipu_di_config_clock(di, sig);  in ipu_di_init_sync_panel()
600 	if (sig->mode.flags & DISPLAY_FLAGS_INTERLACED) {  in ipu_di_init_sync_panel()
601 		ipu_di_sync_config_interlaced(di, sig);  in ipu_di_init_sync_panel()
608 		ipu_di_sync_config_noninterlaced(di, sig, div);  in ipu_di_init_sync_panel()
616 			if (!(sig->hsync_pin == 2 && sig->vsync_pin == 3))  in ipu_di_init_sync_panel()
620 	if (sig->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH)  in ipu_di_init_sync_panel()
621 		di_gen |= ipu_di_gen_polarity(sig->hsync_pin);  in ipu_di_init_sync_panel()
622 	if (sig->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH)  in ipu_di_init_sync_panel()
623 		di_gen |= ipu_di_gen_polarity(sig->vsync_pin);  in ipu_di_init_sync_panel()
625 	if (sig->clk_pol)  in ipu_di_init_sync_panel()
636 	if (sig->enable_pol)  in ipu_di_init_sync_panel()
638 	if (sig->data_pol)  in ipu_di_init_sync_panel()