Lines Matching refs:dc

120 static void dc_link_event(struct ipu_dc *dc, int event, int addr, int priority)  in dc_link_event()  argument
124 reg = readl(dc->base + DC_RL_CH(event)); in dc_link_event()
127 writel(reg, dc->base + DC_RL_CH(event)); in dc_link_event()
130 static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, in dc_write_tmpl() argument
133 struct ipu_dc_priv *priv = dc->priv; in dc_write_tmpl()
170 int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, in ipu_dc_init_sync() argument
173 struct ipu_dc_priv *priv = dc->priv; in ipu_dc_init_sync()
177 dc->di = ipu_di_get_num(di); in ipu_dc_init_sync()
188 if (dc->di) in ipu_dc_init_sync()
193 dc_link_event(dc, DC_EVT_NL, addr, 3); in ipu_dc_init_sync()
194 dc_link_event(dc, DC_EVT_EOL, addr, 2); in ipu_dc_init_sync()
195 dc_link_event(dc, DC_EVT_NEW_DATA, addr, 1); in ipu_dc_init_sync()
198 dc_write_tmpl(dc, addr, WROD(0), 0, map, SYNC_WAVE, 0, 6, 1); in ipu_dc_init_sync()
200 if (dc->di) { in ipu_dc_init_sync()
201 dc_link_event(dc, DC_EVT_NL, 2, 3); in ipu_dc_init_sync()
202 dc_link_event(dc, DC_EVT_EOL, 3, 2); in ipu_dc_init_sync()
203 dc_link_event(dc, DC_EVT_NEW_DATA, 1, 1); in ipu_dc_init_sync()
205 dc_write_tmpl(dc, 2, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); in ipu_dc_init_sync()
206 dc_write_tmpl(dc, 3, WROD(0), 0, map, SYNC_WAVE, 4, 5, 0); in ipu_dc_init_sync()
207 dc_write_tmpl(dc, 4, WRG, 0, map, NULL_WAVE, 0, 0, 1); in ipu_dc_init_sync()
208 dc_write_tmpl(dc, 1, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); in ipu_dc_init_sync()
210 dc_link_event(dc, DC_EVT_NL, 5, 3); in ipu_dc_init_sync()
211 dc_link_event(dc, DC_EVT_EOL, 6, 2); in ipu_dc_init_sync()
212 dc_link_event(dc, DC_EVT_NEW_DATA, 8, 1); in ipu_dc_init_sync()
214 dc_write_tmpl(dc, 5, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); in ipu_dc_init_sync()
215 dc_write_tmpl(dc, 6, WROD(0), 0, map, SYNC_WAVE, 4, 5, 0); in ipu_dc_init_sync()
216 dc_write_tmpl(dc, 7, WRG, 0, map, NULL_WAVE, 0, 0, 1); in ipu_dc_init_sync()
217 dc_write_tmpl(dc, 8, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); in ipu_dc_init_sync()
220 dc_link_event(dc, DC_EVT_NF, 0, 0); in ipu_dc_init_sync()
221 dc_link_event(dc, DC_EVT_NFIELD, 0, 0); in ipu_dc_init_sync()
222 dc_link_event(dc, DC_EVT_EOF, 0, 0); in ipu_dc_init_sync()
223 dc_link_event(dc, DC_EVT_EOFIELD, 0, 0); in ipu_dc_init_sync()
224 dc_link_event(dc, DC_EVT_NEW_CHAN, 0, 0); in ipu_dc_init_sync()
225 dc_link_event(dc, DC_EVT_NEW_ADDR, 0, 0); in ipu_dc_init_sync()
227 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
232 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
234 writel(0x0, dc->base + DC_WR_CH_ADDR); in ipu_dc_init_sync()
235 writel(width, priv->dc_reg + DC_DISP_CONF2(dc->di)); in ipu_dc_init_sync()
256 void ipu_dc_enable_channel(struct ipu_dc *dc) in ipu_dc_enable_channel() argument
261 di = dc->di; in ipu_dc_enable_channel()
263 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
265 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
271 struct ipu_dc *dc = dev_id; in dc_irq_handler() local
274 reg = readl(dc->base + DC_WR_CH_CONF); in dc_irq_handler()
276 writel(reg, dc->base + DC_WR_CH_CONF); in dc_irq_handler()
280 complete(&dc->priv->comp); in dc_irq_handler()
284 void ipu_dc_disable_channel(struct ipu_dc *dc) in ipu_dc_disable_channel() argument
286 struct ipu_dc_priv *priv = dc->priv; in ipu_dc_disable_channel()
292 if (dc->chno == 1) in ipu_dc_disable_channel()
294 else if (dc->chno == 5) in ipu_dc_disable_channel()
306 val = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
308 writel(val, dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
358 struct ipu_dc *dc; in ipu_dc_get() local
363 dc = &priv->channels[channel]; in ipu_dc_get()
367 if (dc->in_use) { in ipu_dc_get()
372 dc->in_use = true; in ipu_dc_get()
376 return dc; in ipu_dc_get()
380 void ipu_dc_put(struct ipu_dc *dc) in ipu_dc_put() argument
382 struct ipu_dc_priv *priv = dc->priv; in ipu_dc_put()
385 dc->in_use = false; in ipu_dc_put()