43 static inline void ipu_cm_write(struct ipu_soc *ipu, u32 value, unsigned offset)  in ipu_cm_write()  function
54 	ipu_cm_write(ipu, val, IPU_SRM_PRI2);  in ipu_srm_dp_sync_update()
310 	ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno));  in __ipu_idmac_reset_current_buffer()
327 	ipu_cm_write(ipu, reg, IPU_CHA_DB_MODE_SEL(channel->num));  in ipu_idmac_set_double_buffer()
418 	ipu_cm_write(ipu, val, IPU_DISP_GEN);  in ipu_module_enable()
422 	ipu_cm_write(ipu, val, IPU_CONF);  in ipu_module_enable()
439 	ipu_cm_write(ipu, val, IPU_CONF);  in ipu_module_disable()
448 	ipu_cm_write(ipu, val, IPU_DISP_GEN);  in ipu_module_disable()
499 		ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));  in ipu_idmac_select_buffer()
501 		ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));  in ipu_idmac_select_buffer()
515 	ipu_cm_write(ipu, 0xF0300000, IPU_GPR); /* write one to clear */  in ipu_idmac_clear_buffer()
518 		ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));  in ipu_idmac_clear_buffer()
521 		ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));  in ipu_idmac_clear_buffer()
524 		ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF2_RDY(chno));  in ipu_idmac_clear_buffer()
529 	ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */  in ipu_idmac_clear_buffer()
581 	ipu_cm_write(ipu, BIT(irq % 32), IPU_INT_STAT(irq / 32));  in ipu_wait_interrupt()
608 	ipu_cm_write(ipu, 0xf0000000, IPU_GPR); /* write one to clear */  in ipu_idmac_disable_channel()
612 		ipu_cm_write(ipu, idma_mask(channel->num),  in ipu_idmac_disable_channel()
618 		ipu_cm_write(ipu, idma_mask(channel->num),  in ipu_idmac_disable_channel()
622 	ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */  in ipu_idmac_disable_channel()
627 	ipu_cm_write(ipu, val, IPU_CHA_DB_MODE_SEL(channel->num));  in ipu_idmac_disable_channel()
664 	ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);  in ipu_memory_reset()
695 	ipu_cm_write(ipu, val, IPU_CONF);  in ipu_set_csi_src_mux()
721 	ipu_cm_write(ipu, val, IPU_CONF);  in ipu_set_ic_src_mux()
1131 		ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));  in ipu_irq_init()
1315 	ipu_cm_write(ipu, 0x00400000L | (IPU_MCU_T_DEFAULT << 18),  in ipu_probe()