Lines Matching refs:resp

235 	struct virtio_gpu_ctrl_hdr *resp;  in virtio_gpu_dequeue_ctrl_func()  local
248 resp = (struct virtio_gpu_ctrl_hdr *)entry->resp_buf; in virtio_gpu_dequeue_ctrl_func()
249 if (resp->type != cpu_to_le32(VIRTIO_GPU_RESP_OK_NODATA)) in virtio_gpu_dequeue_ctrl_func()
250 DRM_DEBUG("response 0x%x\n", le32_to_cpu(resp->type)); in virtio_gpu_dequeue_ctrl_func()
251 if (resp->flags & cpu_to_le32(VIRTIO_GPU_FLAG_FENCE)) { in virtio_gpu_dequeue_ctrl_func()
252 u64 f = le64_to_cpu(resp->fence_id); in virtio_gpu_dequeue_ctrl_func()
563 struct virtio_gpu_resp_display_info *resp = in virtio_gpu_cmd_get_display_info_cb() local
569 vgdev->outputs[i].info = resp->pmodes[i]; in virtio_gpu_cmd_get_display_info_cb()
570 if (resp->pmodes[i].enabled) { in virtio_gpu_cmd_get_display_info_cb()
572 le32_to_cpu(resp->pmodes[i].r.width), in virtio_gpu_cmd_get_display_info_cb()
573 le32_to_cpu(resp->pmodes[i].r.height), in virtio_gpu_cmd_get_display_info_cb()
574 le32_to_cpu(resp->pmodes[i].r.x), in virtio_gpu_cmd_get_display_info_cb()
575 le32_to_cpu(resp->pmodes[i].r.y)); in virtio_gpu_cmd_get_display_info_cb()
594 struct virtio_gpu_resp_capset_info *resp = in virtio_gpu_cmd_get_capset_info_cb() local
599 vgdev->capsets[i].id = le32_to_cpu(resp->capset_id); in virtio_gpu_cmd_get_capset_info_cb()
600 vgdev->capsets[i].max_version = le32_to_cpu(resp->capset_max_version); in virtio_gpu_cmd_get_capset_info_cb()
601 vgdev->capsets[i].max_size = le32_to_cpu(resp->capset_max_size); in virtio_gpu_cmd_get_capset_info_cb()
611 struct virtio_gpu_resp_capset *resp = in virtio_gpu_cmd_capset_cb() local
619 memcpy(cache_ent->caps_cache, resp->capset_data, in virtio_gpu_cmd_capset_cb()