102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi)  in tegra_dsi_get_state()  argument
104 	return to_dsi_state(dsi->output.connector.state);  in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned long reg)  in tegra_dsi_readl()  argument
109 	return readl(dsi->regs + (reg << 2));  in tegra_dsi_readl()
112 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value,  in tegra_dsi_writel()  argument
115 	writel(value, dsi->regs + (reg << 2));  in tegra_dsi_writel()
121 	struct tegra_dsi *dsi = node->info_ent->data;  in tegra_dsi_show_regs()  local
122 	struct drm_crtc *crtc = dsi->output.encoder.crtc;  in tegra_dsi_show_regs()
135 		   tegra_dsi_readl(dsi, name))  in tegra_dsi_show_regs()
230 static int tegra_dsi_debugfs_init(struct tegra_dsi *dsi,  in tegra_dsi_debugfs_init()  argument
233 	const char *name = dev_name(dsi->dev);  in tegra_dsi_debugfs_init()
237 	dsi->debugfs = debugfs_create_dir(name, minor->debugfs_root);  in tegra_dsi_debugfs_init()
238 	if (!dsi->debugfs)  in tegra_dsi_debugfs_init()
241 	dsi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files),  in tegra_dsi_debugfs_init()
243 	if (!dsi->debugfs_files) {  in tegra_dsi_debugfs_init()
249 		dsi->debugfs_files[i].data = dsi;  in tegra_dsi_debugfs_init()
251 	err = drm_debugfs_create_files(dsi->debugfs_files,  in tegra_dsi_debugfs_init()
253 				       dsi->debugfs, minor);  in tegra_dsi_debugfs_init()
257 	dsi->minor = minor;  in tegra_dsi_debugfs_init()
262 	kfree(dsi->debugfs_files);  in tegra_dsi_debugfs_init()
263 	dsi->debugfs_files = NULL;  in tegra_dsi_debugfs_init()
265 	debugfs_remove(dsi->debugfs);  in tegra_dsi_debugfs_init()
266 	dsi->debugfs = NULL;  in tegra_dsi_debugfs_init()
271 static void tegra_dsi_debugfs_exit(struct tegra_dsi *dsi)  in tegra_dsi_debugfs_exit()  argument
273 	drm_debugfs_remove_files(dsi->debugfs_files, ARRAY_SIZE(debugfs_files),  in tegra_dsi_debugfs_exit()
274 				 dsi->minor);  in tegra_dsi_debugfs_exit()
275 	dsi->minor = NULL;  in tegra_dsi_debugfs_exit()
277 	kfree(dsi->debugfs_files);  in tegra_dsi_debugfs_exit()
278 	dsi->debugfs_files = NULL;  in tegra_dsi_debugfs_exit()
280 	debugfs_remove(dsi->debugfs);  in tegra_dsi_debugfs_exit()
281 	dsi->debugfs = NULL;  in tegra_dsi_debugfs_exit()
377 static void tegra_dsi_set_phy_timing(struct tegra_dsi *dsi,  in tegra_dsi_set_phy_timing()  argument
387 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_0);  in tegra_dsi_set_phy_timing()
393 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_1);  in tegra_dsi_set_phy_timing()
398 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_2);  in tegra_dsi_set_phy_timing()
403 	tegra_dsi_writel(dsi, value, DSI_BTA_TIMING);  in tegra_dsi_set_phy_timing()
405 	if (dsi->slave)  in tegra_dsi_set_phy_timing()
406 		tegra_dsi_set_phy_timing(dsi->slave, period, timing);  in tegra_dsi_set_phy_timing()
463 static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int start,  in tegra_dsi_ganged_enable()  argument
468 	tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START);  in tegra_dsi_ganged_enable()
469 	tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE);  in tegra_dsi_ganged_enable()
472 	tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL);  in tegra_dsi_ganged_enable()
475 static void tegra_dsi_enable(struct tegra_dsi *dsi)  in tegra_dsi_enable()  argument
479 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_enable()
481 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_enable()
483 	if (dsi->slave)  in tegra_dsi_enable()
484 		tegra_dsi_enable(dsi->slave);  in tegra_dsi_enable()
487 static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi)  in tegra_dsi_get_lanes()  argument
489 	if (dsi->master)  in tegra_dsi_get_lanes()
490 		return dsi->master->lanes + dsi->lanes;  in tegra_dsi_get_lanes()
492 	if (dsi->slave)  in tegra_dsi_get_lanes()
493 		return dsi->lanes + dsi->slave->lanes;  in tegra_dsi_get_lanes()
495 	return dsi->lanes;  in tegra_dsi_get_lanes()
498 static void tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe,  in tegra_dsi_configure()  argument
507 	if (dsi->master)  in tegra_dsi_configure()
508 		state = tegra_dsi_get_state(dsi->master);  in tegra_dsi_configure()
510 		state = tegra_dsi_get_state(dsi);  in tegra_dsi_configure()
515 	if (dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {  in tegra_dsi_configure()
518 	} else if (dsi->flags & MIPI_DSI_MODE_VIDEO) {  in tegra_dsi_configure()
528 		DSI_CONTROL_LANES(dsi->lanes - 1) |  in tegra_dsi_configure()
530 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_configure()
532 	tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD);  in tegra_dsi_configure()
535 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_configure()
537 	value = tegra_dsi_readl(dsi, DSI_CONTROL);  in tegra_dsi_configure()
539 	if (dsi->flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)  in tegra_dsi_configure()
545 	if (dsi->flags & MIPI_DSI_MODE_VIDEO)  in tegra_dsi_configure()
552 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_configure()
555 		tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i);  in tegra_dsi_configure()
557 	if (dsi->flags & MIPI_DSI_MODE_VIDEO) {  in tegra_dsi_configure()
567 		if ((dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) == 0)  in tegra_dsi_configure()
578 		tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1);  in tegra_dsi_configure()
579 		tegra_dsi_writel(dsi, hact << 16 | hbp, DSI_PKT_LEN_2_3);  in tegra_dsi_configure()
580 		tegra_dsi_writel(dsi, hfp, DSI_PKT_LEN_4_5);  in tegra_dsi_configure()
581 		tegra_dsi_writel(dsi, 0x0f0f << 16, DSI_PKT_LEN_6_7);  in tegra_dsi_configure()
584 		tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY);  in tegra_dsi_configure()
590 		if (dsi->master || dsi->slave) {  in tegra_dsi_configure()
600 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_0_1);  in tegra_dsi_configure()
601 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_2_3);  in tegra_dsi_configure()
602 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_4_5);  in tegra_dsi_configure()
603 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_6_7);  in tegra_dsi_configure()
607 		tegra_dsi_writel(dsi, value, DSI_DCS_CMDS);  in tegra_dsi_configure()
610 		if (dsi->master || dsi->slave) {  in tegra_dsi_configure()
628 		tegra_dsi_writel(dsi, value, DSI_SOL_DELAY);  in tegra_dsi_configure()
631 	if (dsi->slave) {  in tegra_dsi_configure()
632 		tegra_dsi_configure(dsi->slave, pipe, mode);  in tegra_dsi_configure()
638 		tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2);  in tegra_dsi_configure()
639 		tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2,  in tegra_dsi_configure()
644 static int tegra_dsi_wait_idle(struct tegra_dsi *dsi, unsigned long timeout)  in tegra_dsi_wait_idle()  argument
651 		value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_wait_idle()
661 static void tegra_dsi_video_disable(struct tegra_dsi *dsi)  in tegra_dsi_video_disable()  argument
665 	value = tegra_dsi_readl(dsi, DSI_CONTROL);  in tegra_dsi_video_disable()
667 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_video_disable()
669 	if (dsi->slave)  in tegra_dsi_video_disable()
670 		tegra_dsi_video_disable(dsi->slave);  in tegra_dsi_video_disable()
673 static void tegra_dsi_ganged_disable(struct tegra_dsi *dsi)  in tegra_dsi_ganged_disable()  argument
675 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_START);  in tegra_dsi_ganged_disable()
676 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_SIZE);  in tegra_dsi_ganged_disable()
677 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL);  in tegra_dsi_ganged_disable()
680 static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk,  in tegra_dsi_set_timeout()  argument
689 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_0);  in tegra_dsi_set_timeout()
694 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_1);  in tegra_dsi_set_timeout()
697 	tegra_dsi_writel(dsi, value, DSI_TO_TALLY);  in tegra_dsi_set_timeout()
699 	if (dsi->slave)  in tegra_dsi_set_timeout()
700 		tegra_dsi_set_timeout(dsi->slave, bclk, vrefresh);  in tegra_dsi_set_timeout()
703 static void tegra_dsi_disable(struct tegra_dsi *dsi)  in tegra_dsi_disable()  argument
707 	if (dsi->slave) {  in tegra_dsi_disable()
708 		tegra_dsi_ganged_disable(dsi->slave);  in tegra_dsi_disable()
709 		tegra_dsi_ganged_disable(dsi);  in tegra_dsi_disable()
712 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_disable()
714 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_disable()
716 	if (dsi->slave)  in tegra_dsi_disable()
717 		tegra_dsi_disable(dsi->slave);  in tegra_dsi_disable()
722 static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)  in tegra_dsi_soft_reset()  argument
726 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
728 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
732 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
734 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
738 	value = tegra_dsi_readl(dsi, DSI_TRIGGER);  in tegra_dsi_soft_reset()
740 		tegra_dsi_writel(dsi, 0, DSI_TRIGGER);  in tegra_dsi_soft_reset()
742 	if (dsi->slave)  in tegra_dsi_soft_reset()
743 		tegra_dsi_soft_reset(dsi->slave);  in tegra_dsi_soft_reset()
802 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_disable()  local
809 	tegra_dsi_video_disable(dsi);  in tegra_dsi_encoder_disable()
823 	err = tegra_dsi_wait_idle(dsi, 100);  in tegra_dsi_encoder_disable()
825 		dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err);  in tegra_dsi_encoder_disable()
827 	tegra_dsi_soft_reset(dsi);  in tegra_dsi_encoder_disable()
832 	tegra_dsi_disable(dsi);  in tegra_dsi_encoder_disable()
842 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_enable()  local
846 	state = tegra_dsi_get_state(dsi);  in tegra_dsi_encoder_enable()
848 	tegra_dsi_set_timeout(dsi, state->bclk, state->vrefresh);  in tegra_dsi_encoder_enable()
854 	tegra_dsi_set_phy_timing(dsi, state->period * 8, &state->timing);  in tegra_dsi_encoder_enable()
859 	tegra_dsi_configure(dsi, dc->pipe, mode);  in tegra_dsi_encoder_enable()
869 	tegra_dsi_enable(dsi);  in tegra_dsi_encoder_enable()
885 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_atomic_check()  local
892 	err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div);  in tegra_dsi_encoder_atomic_check()
896 	state->lanes = tegra_dsi_get_lanes(dsi);  in tegra_dsi_encoder_atomic_check()
898 	err = tegra_dsi_get_format(dsi->format, &state->format);  in tegra_dsi_encoder_atomic_check()
925 		dev_err(dsi->dev, "failed to validate D-PHY timing: %d\n", err);  in tegra_dsi_encoder_atomic_check()
948 	err = tegra_dc_state_setup_clock(dc, crtc_state, dsi->clk_parent,  in tegra_dsi_encoder_atomic_check()
964 static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)  in tegra_dsi_pad_enable()  argument
969 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0);  in tegra_dsi_pad_enable()
974 static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)  in tegra_dsi_pad_calibrate()  argument
978 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);  in tegra_dsi_pad_calibrate()
979 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);  in tegra_dsi_pad_calibrate()
980 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2);  in tegra_dsi_pad_calibrate()
981 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3);  in tegra_dsi_pad_calibrate()
982 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4);  in tegra_dsi_pad_calibrate()
985 	tegra_dsi_pad_enable(dsi);  in tegra_dsi_pad_calibrate()
990 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);  in tegra_dsi_pad_calibrate()
994 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);  in tegra_dsi_pad_calibrate()
996 	return tegra_mipi_calibrate(dsi->mipi);  in tegra_dsi_pad_calibrate()
1002 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_init()  local
1005 	reset_control_deassert(dsi->rst);  in tegra_dsi_init()
1007 	err = tegra_dsi_pad_calibrate(dsi);  in tegra_dsi_init()
1009 		dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);  in tegra_dsi_init()
1014 	if (!dsi->master) {  in tegra_dsi_init()
1015 		dsi->output.dev = client->dev;  in tegra_dsi_init()
1017 		drm_connector_init(drm, &dsi->output.connector,  in tegra_dsi_init()
1020 		drm_connector_helper_add(&dsi->output.connector,  in tegra_dsi_init()
1022 		dsi->output.connector.dpms = DRM_MODE_DPMS_OFF;  in tegra_dsi_init()
1024 		drm_encoder_init(drm, &dsi->output.encoder,  in tegra_dsi_init()
1027 		drm_encoder_helper_add(&dsi->output.encoder,  in tegra_dsi_init()
1030 		drm_mode_connector_attach_encoder(&dsi->output.connector,  in tegra_dsi_init()
1031 						  &dsi->output.encoder);  in tegra_dsi_init()
1032 		drm_connector_register(&dsi->output.connector);  in tegra_dsi_init()
1034 		err = tegra_output_init(drm, &dsi->output);  in tegra_dsi_init()
1042 		dsi->output.encoder.possible_crtcs = 0x3;  in tegra_dsi_init()
1046 		err = tegra_dsi_debugfs_init(dsi, drm->primary);  in tegra_dsi_init()
1048 			dev_err(dsi->dev, "debugfs setup failed: %d\n", err);  in tegra_dsi_init()
1054 	reset_control_assert(dsi->rst);  in tegra_dsi_init()
1060 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_exit()  local
1062 	tegra_output_exit(&dsi->output);  in tegra_dsi_exit()
1065 		tegra_dsi_debugfs_exit(dsi);  in tegra_dsi_exit()
1067 	reset_control_assert(dsi->rst);  in tegra_dsi_exit()
1077 static int tegra_dsi_setup_clocks(struct tegra_dsi *dsi)  in tegra_dsi_setup_clocks()  argument
1082 	parent = clk_get_parent(dsi->clk);  in tegra_dsi_setup_clocks()
1086 	err = clk_set_parent(parent, dsi->clk_parent);  in tegra_dsi_setup_clocks()
1112 static ssize_t tegra_dsi_read_response(struct tegra_dsi *dsi,  in tegra_dsi_read_response()  argument
1123 	value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_read_response()
1128 		dev_dbg(dsi->dev, "Acknowledge and error report: %04x\n",  in tegra_dsi_read_response()
1132 				dev_dbg(dsi->dev, "  %2u: %s\n", i,  in tegra_dsi_read_response()
1156 		dev_err(dsi->dev, "unhandled response type: %02x\n",  in tegra_dsi_read_response()
1167 			value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_read_response()
1177 static int tegra_dsi_transmit(struct tegra_dsi *dsi, unsigned long timeout)  in tegra_dsi_transmit()  argument
1179 	tegra_dsi_writel(dsi, DSI_TRIGGER_HOST, DSI_TRIGGER);  in tegra_dsi_transmit()
1184 		u32 value = tegra_dsi_readl(dsi, DSI_TRIGGER);  in tegra_dsi_transmit()
1195 static int tegra_dsi_wait_for_response(struct tegra_dsi *dsi,  in tegra_dsi_wait_for_response()  argument
1201 		u32 value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_wait_for_response()
1214 static void tegra_dsi_writesl(struct tegra_dsi *dsi, unsigned long offset,  in tegra_dsi_writesl()  argument
1227 		tegra_dsi_writel(dsi, value, DSI_WR_DATA);  in tegra_dsi_writesl()
1234 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_transfer()  local
1248 	if (packet.size > dsi->video_fifo_depth * 4)  in tegra_dsi_host_transfer()
1252 	value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_host_transfer()
1255 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1259 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_host_transfer()
1261 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_host_transfer()
1275 	if (packet.size > dsi->host_fifo_depth * 4)  in tegra_dsi_host_transfer()
1278 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1286 		value = tegra_dsi_readl(dsi, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1288 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1292 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_host_transfer()
1296 	tegra_dsi_writel(dsi, value, DSI_WR_DATA);  in tegra_dsi_host_transfer()
1300 		tegra_dsi_writesl(dsi, DSI_WR_DATA, packet.payload,  in tegra_dsi_host_transfer()
1303 	err = tegra_dsi_transmit(dsi, 250);  in tegra_dsi_host_transfer()
1309 		err = tegra_dsi_wait_for_response(dsi, 250);  in tegra_dsi_host_transfer()
1315 		value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_host_transfer()
1330 			dev_err(dsi->dev, "unknown status: %08x\n", value);  in tegra_dsi_host_transfer()
1335 			err = tegra_dsi_read_response(dsi, msg, count);  in tegra_dsi_host_transfer()
1337 				dev_err(dsi->dev,  in tegra_dsi_host_transfer()
1359 static int tegra_dsi_ganged_setup(struct tegra_dsi *dsi)  in tegra_dsi_ganged_setup()  argument
1365 	parent = clk_get_parent(dsi->slave->clk);  in tegra_dsi_ganged_setup()
1369 	err = clk_set_parent(parent, dsi->clk_parent);  in tegra_dsi_ganged_setup()
1379 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_attach()  local
1381 	dsi->flags = device->mode_flags;  in tegra_dsi_host_attach()
1382 	dsi->format = device->format;  in tegra_dsi_host_attach()
1383 	dsi->lanes = device->lanes;  in tegra_dsi_host_attach()
1385 	if (dsi->slave) {  in tegra_dsi_host_attach()
1388 		dev_dbg(dsi->dev, "attaching dual-channel device %s\n",  in tegra_dsi_host_attach()
1391 		err = tegra_dsi_ganged_setup(dsi);  in tegra_dsi_host_attach()
1393 			dev_err(dsi->dev, "failed to set up ganged mode: %d\n",  in tegra_dsi_host_attach()
1403 	if (!dsi->master) {  in tegra_dsi_host_attach()
1404 		struct tegra_output *output = &dsi->output;  in tegra_dsi_host_attach()
1419 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_detach()  local
1420 	struct tegra_output *output = &dsi->output;  in tegra_dsi_host_detach()
1438 static int tegra_dsi_ganged_probe(struct tegra_dsi *dsi)  in tegra_dsi_ganged_probe()  argument
1442 	np = of_parse_phandle(dsi->dev->of_node, "nvidia,ganged-mode", 0);  in tegra_dsi_ganged_probe()
1446 		dsi->slave = platform_get_drvdata(gangster);  in tegra_dsi_ganged_probe()
1449 		if (!dsi->slave)  in tegra_dsi_ganged_probe()
1452 		dsi->slave->master = dsi;  in tegra_dsi_ganged_probe()
1460 	struct tegra_dsi *dsi;  in tegra_dsi_probe()  local
1464 	dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL);  in tegra_dsi_probe()
1465 	if (!dsi)  in tegra_dsi_probe()
1468 	dsi->output.dev = dsi->dev = &pdev->dev;  in tegra_dsi_probe()
1469 	dsi->video_fifo_depth = 1920;  in tegra_dsi_probe()
1470 	dsi->host_fifo_depth = 64;  in tegra_dsi_probe()
1472 	err = tegra_dsi_ganged_probe(dsi);  in tegra_dsi_probe()
1476 	err = tegra_output_probe(&dsi->output);  in tegra_dsi_probe()
1480 	dsi->output.connector.polled = DRM_CONNECTOR_POLL_HPD;  in tegra_dsi_probe()
1487 	dsi->flags = MIPI_DSI_MODE_VIDEO;  in tegra_dsi_probe()
1488 	dsi->format = MIPI_DSI_FMT_RGB888;  in tegra_dsi_probe()
1489 	dsi->lanes = 4;  in tegra_dsi_probe()
1491 	dsi->rst = devm_reset_control_get(&pdev->dev, "dsi");  in tegra_dsi_probe()
1492 	if (IS_ERR(dsi->rst))  in tegra_dsi_probe()
1493 		return PTR_ERR(dsi->rst);  in tegra_dsi_probe()
1495 	dsi->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_dsi_probe()
1496 	if (IS_ERR(dsi->clk)) {  in tegra_dsi_probe()
1498 		err = PTR_ERR(dsi->clk);  in tegra_dsi_probe()
1502 	err = clk_prepare_enable(dsi->clk);  in tegra_dsi_probe()
1508 	dsi->clk_lp = devm_clk_get(&pdev->dev, "lp");  in tegra_dsi_probe()
1509 	if (IS_ERR(dsi->clk_lp)) {  in tegra_dsi_probe()
1511 		err = PTR_ERR(dsi->clk_lp);  in tegra_dsi_probe()
1515 	err = clk_prepare_enable(dsi->clk_lp);  in tegra_dsi_probe()
1521 	dsi->clk_parent = devm_clk_get(&pdev->dev, "parent");  in tegra_dsi_probe()
1522 	if (IS_ERR(dsi->clk_parent)) {  in tegra_dsi_probe()
1524 		err = PTR_ERR(dsi->clk_parent);  in tegra_dsi_probe()
1528 	dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");  in tegra_dsi_probe()
1529 	if (IS_ERR(dsi->vdd)) {  in tegra_dsi_probe()
1531 		err = PTR_ERR(dsi->vdd);  in tegra_dsi_probe()
1535 	err = regulator_enable(dsi->vdd);  in tegra_dsi_probe()
1541 	err = tegra_dsi_setup_clocks(dsi);  in tegra_dsi_probe()
1548 	dsi->regs = devm_ioremap_resource(&pdev->dev, regs);  in tegra_dsi_probe()
1549 	if (IS_ERR(dsi->regs)) {  in tegra_dsi_probe()
1550 		err = PTR_ERR(dsi->regs);  in tegra_dsi_probe()
1554 	dsi->mipi = tegra_mipi_request(&pdev->dev);  in tegra_dsi_probe()
1555 	if (IS_ERR(dsi->mipi)) {  in tegra_dsi_probe()
1556 		err = PTR_ERR(dsi->mipi);  in tegra_dsi_probe()
1560 	dsi->host.ops = &tegra_dsi_host_ops;  in tegra_dsi_probe()
1561 	dsi->host.dev = &pdev->dev;  in tegra_dsi_probe()
1563 	err = mipi_dsi_host_register(&dsi->host);  in tegra_dsi_probe()
1569 	INIT_LIST_HEAD(&dsi->client.list);  in tegra_dsi_probe()
1570 	dsi->client.ops = &dsi_client_ops;  in tegra_dsi_probe()
1571 	dsi->client.dev = &pdev->dev;  in tegra_dsi_probe()
1573 	err = host1x_client_register(&dsi->client);  in tegra_dsi_probe()
1580 	platform_set_drvdata(pdev, dsi);  in tegra_dsi_probe()
1585 	mipi_dsi_host_unregister(&dsi->host);  in tegra_dsi_probe()
1587 	tegra_mipi_free(dsi->mipi);  in tegra_dsi_probe()
1589 	regulator_disable(dsi->vdd);  in tegra_dsi_probe()
1591 	clk_disable_unprepare(dsi->clk_lp);  in tegra_dsi_probe()
1593 	clk_disable_unprepare(dsi->clk);  in tegra_dsi_probe()
1595 	reset_control_assert(dsi->rst);  in tegra_dsi_probe()
1601 	struct tegra_dsi *dsi = platform_get_drvdata(pdev);  in tegra_dsi_remove()  local
1604 	err = host1x_client_unregister(&dsi->client);  in tegra_dsi_remove()
1611 	tegra_output_remove(&dsi->output);  in tegra_dsi_remove()
1613 	mipi_dsi_host_unregister(&dsi->host);  in tegra_dsi_remove()
1614 	tegra_mipi_free(dsi->mipi);  in tegra_dsi_remove()
1616 	regulator_disable(dsi->vdd);  in tegra_dsi_remove()
1617 	clk_disable_unprepare(dsi->clk_lp);  in tegra_dsi_remove()
1618 	clk_disable_unprepare(dsi->clk);  in tegra_dsi_remove()
1619 	reset_control_assert(dsi->rst);  in tegra_dsi_remove()