40 	u32 tmp;  in vce_v2_0_set_sw_cg()  local
43 		tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_sw_cg()
44 		tmp |= 0xe70000;  in vce_v2_0_set_sw_cg()
45 		WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_sw_cg()
47 		tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
48 		tmp |= 0xff000000;  in vce_v2_0_set_sw_cg()
49 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
51 		tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
52 		tmp &= ~0x3fc;  in vce_v2_0_set_sw_cg()
53 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
57 		tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_sw_cg()
58 		tmp |= 0xe7;  in vce_v2_0_set_sw_cg()
59 		tmp &= ~0xe70000;  in vce_v2_0_set_sw_cg()
60 		WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_sw_cg()
62 		tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
63 		tmp |= 0x1fe000;  in vce_v2_0_set_sw_cg()
64 		tmp &= ~0xff000000;  in vce_v2_0_set_sw_cg()
65 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
67 		tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
68 		tmp |= 0x3fc;  in vce_v2_0_set_sw_cg()
69 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
75 	u32 orig, tmp;  in vce_v2_0_set_dyn_cg()  local
77 	tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_dyn_cg()
78 	tmp &= ~0x00060006;  in vce_v2_0_set_dyn_cg()
80 		tmp |= 0xe10000;  in vce_v2_0_set_dyn_cg()
82 		tmp |= 0xe1;  in vce_v2_0_set_dyn_cg()
83 		tmp &= ~0xe10000;  in vce_v2_0_set_dyn_cg()
85 	WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_dyn_cg()
87 	orig = tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_dyn_cg()
88 	tmp &= ~0x1fe000;  in vce_v2_0_set_dyn_cg()
89 	tmp &= ~0xff000000;  in vce_v2_0_set_dyn_cg()
90 	if (tmp != orig)  in vce_v2_0_set_dyn_cg()
91 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_dyn_cg()
93 	orig = tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_dyn_cg()
94 	tmp &= ~0x3fc;  in vce_v2_0_set_dyn_cg()
95 	if (tmp != orig)  in vce_v2_0_set_dyn_cg()
96 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_dyn_cg()
128 	u32 tmp;  in vce_v2_0_init_cg()  local
130 	tmp = RREG32(VCE_CLOCK_GATING_A);  in vce_v2_0_init_cg()
131 	tmp &= ~(CGC_CLK_GATE_DLY_TIMER_MASK | CGC_CLK_GATER_OFF_DLY_TIMER_MASK);  in vce_v2_0_init_cg()
132 	tmp |= (CGC_CLK_GATE_DLY_TIMER(0) | CGC_CLK_GATER_OFF_DLY_TIMER(4));  in vce_v2_0_init_cg()
133 	tmp |= CGC_UENC_WAIT_AWAKE;  in vce_v2_0_init_cg()
134 	WREG32(VCE_CLOCK_GATING_A, tmp);  in vce_v2_0_init_cg()
136 	tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_init_cg()
137 	tmp &= ~(CLOCK_ON_DELAY_MASK | CLOCK_OFF_DELAY_MASK);  in vce_v2_0_init_cg()
138 	tmp |= (CLOCK_ON_DELAY(0) | CLOCK_OFF_DELAY(4));  in vce_v2_0_init_cg()
139 	WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_init_cg()
141 	tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_init_cg()
142 	tmp |= 0x10;  in vce_v2_0_init_cg()
143 	tmp &= ~0x100000;  in vce_v2_0_init_cg()
144 	WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_init_cg()