Lines Matching refs:WREG32_RCU
81 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), in sumo_initialize_m3_arb()
85 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), in sumo_initialize_m3_arb()
89 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), in sumo_initialize_m3_arb()
123 WREG32_RCU(RCU_ALTVDDNB_NOTIFY, param); in sumo_smu_notify_alt_vddnb_change()
157 WREG32_RCU(RCU_GNB_PWR_REP_TIMER_CNTL, timer_value); in sumo_enable_boost_timer()
158 WREG32_RCU(RCU_BOOST_MARGIN, pi->sys_info.sclk_dpm_boost_margin); in sumo_enable_boost_timer()
159 WREG32_RCU(RCU_THROTTLE_MARGIN, pi->sys_info.sclk_dpm_throttle_margin); in sumo_enable_boost_timer()
160 WREG32_RCU(GNB_TDP_LIMIT, pi->sys_info.gnb_tdp_limit); in sumo_enable_boost_timer()
161 WREG32_RCU(RCU_SclkDpmTdpLimitPG, pi->sys_info.sclk_dpm_tdp_limit_pg); in sumo_enable_boost_timer()
205 WREG32_RCU(regoffset, sclk_dpm_tdp_limit); in sumo_set_tdp_limit()
214 WREG32_RCU(RCU_GPU_BOOST_DISABLE, boost_disable); in sumo_boost_state_enable()