Lines Matching refs:ps
77 struct sumo_ps *ps = rps->ps_priv; in sumo_get_ps() local
79 return ps; in sumo_get_ps()
346 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_bsp() local
348 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
350 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) in sumo_program_bsp()
355 for (i = 0; i < ps->num_levels - 1; i++) in sumo_program_bsp()
360 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) in sumo_program_bsp()
389 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_at() local
409 for (i = 0; i < ps->num_levels; i++) { in sumo_program_at()
410 asi = (i == ps->num_levels - 1) ? pi->pasi : pi->asi; in sumo_program_at()
412 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
419 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) { in sumo_program_at()
424 a_t = CG_R(m_a * r[ps->num_levels - 1] / 100) | in sumo_program_at()
425 CG_L(m_a * l[ps->num_levels - 1] / 100); in sumo_program_at()
1044 struct sumo_ps *ps, in sumo_patch_thermal_state() argument
1061 ps->levels[0].vddc_index = current_vddc; in sumo_patch_thermal_state()
1063 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()
1064 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
1066 ps->levels[0].ss_divider_index = in sumo_patch_thermal_state()
1067 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in sumo_patch_thermal_state()
1069 ps->levels[0].ds_divider_index = in sumo_patch_thermal_state()
1070 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_patch_thermal_state()
1072 if (ps->levels[0].ds_divider_index > ps->levels[0].ss_divider_index + 1) in sumo_patch_thermal_state()
1073 ps->levels[0].ds_divider_index = ps->levels[0].ss_divider_index + 1; in sumo_patch_thermal_state()
1075 if (ps->levels[0].ss_divider_index == ps->levels[0].ds_divider_index) { in sumo_patch_thermal_state()
1076 if (ps->levels[0].ss_divider_index > 1) in sumo_patch_thermal_state()
1077 ps->levels[0].ss_divider_index = ps->levels[0].ss_divider_index - 1; in sumo_patch_thermal_state()
1080 if (ps->levels[0].ss_divider_index == 0) in sumo_patch_thermal_state()
1081 ps->levels[0].ds_divider_index = 0; in sumo_patch_thermal_state()
1083 if (ps->levels[0].ds_divider_index == 0) in sumo_patch_thermal_state()
1084 ps->levels[0].ss_divider_index = 0; in sumo_patch_thermal_state()
1091 struct sumo_ps *ps = sumo_get_ps(new_rps); in sumo_apply_state_adjust_rules() local
1100 return sumo_patch_thermal_state(rdev, ps, current_ps); in sumo_apply_state_adjust_rules()
1104 ps->flags |= SUMO_POWERSTATE_FLAGS_BOOST_STATE; in sumo_apply_state_adjust_rules()
1110 ps->flags |= SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE; in sumo_apply_state_adjust_rules()
1112 for (i = 0; i < ps->num_levels; i++) { in sumo_apply_state_adjust_rules()
1113 if (ps->levels[i].vddc_index < min_voltage) in sumo_apply_state_adjust_rules()
1114 ps->levels[i].vddc_index = min_voltage; in sumo_apply_state_adjust_rules()
1116 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1117 ps->levels[i].sclk = in sumo_apply_state_adjust_rules()
1120 ps->levels[i].ss_divider_index = in sumo_apply_state_adjust_rules()
1121 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in sumo_apply_state_adjust_rules()
1123 ps->levels[i].ds_divider_index = in sumo_apply_state_adjust_rules()
1124 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_apply_state_adjust_rules()
1126 if (ps->levels[i].ds_divider_index > ps->levels[i].ss_divider_index + 1) in sumo_apply_state_adjust_rules()
1127 ps->levels[i].ds_divider_index = ps->levels[i].ss_divider_index + 1; in sumo_apply_state_adjust_rules()
1129 if (ps->levels[i].ss_divider_index == ps->levels[i].ds_divider_index) { in sumo_apply_state_adjust_rules()
1130 if (ps->levels[i].ss_divider_index > 1) in sumo_apply_state_adjust_rules()
1131 ps->levels[i].ss_divider_index = ps->levels[i].ss_divider_index - 1; in sumo_apply_state_adjust_rules()
1134 if (ps->levels[i].ss_divider_index == 0) in sumo_apply_state_adjust_rules()
1135 ps->levels[i].ds_divider_index = 0; in sumo_apply_state_adjust_rules()
1137 if (ps->levels[i].ds_divider_index == 0) in sumo_apply_state_adjust_rules()
1138 ps->levels[i].ss_divider_index = 0; in sumo_apply_state_adjust_rules()
1140 if (ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE) in sumo_apply_state_adjust_rules()
1141 ps->levels[i].allow_gnb_slow = 1; in sumo_apply_state_adjust_rules()
1144 ps->levels[i].allow_gnb_slow = 0; in sumo_apply_state_adjust_rules()
1145 else if (i == ps->num_levels - 1) in sumo_apply_state_adjust_rules()
1146 ps->levels[i].allow_gnb_slow = 0; in sumo_apply_state_adjust_rules()
1148 ps->levels[i].allow_gnb_slow = 1; in sumo_apply_state_adjust_rules()
1394 struct sumo_ps *ps) in sumo_patch_boot_state() argument
1398 ps->num_levels = 1; in sumo_patch_boot_state()
1399 ps->flags = 0; in sumo_patch_boot_state()
1400 ps->levels[0] = pi->boot_pl; in sumo_patch_boot_state()
1408 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_parse_pplib_non_clock_info() local
1424 sumo_patch_boot_state(rdev, ps); in sumo_parse_pplib_non_clock_info()
1435 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_parse_pplib_clock_info() local
1436 struct sumo_pl *pl = &ps->levels[index]; in sumo_parse_pplib_clock_info()
1445 ps->num_levels = index + 1; in sumo_parse_pplib_clock_info()
1468 struct sumo_ps *ps; in sumo_parse_power_table() local
1485 rdev->pm.dpm.ps = kzalloc(sizeof(struct radeon_ps) * in sumo_parse_power_table()
1487 if (!rdev->pm.dpm.ps) in sumo_parse_power_table()
1498 ps = kzalloc(sizeof(struct sumo_ps), GFP_KERNEL); in sumo_parse_power_table()
1499 if (ps == NULL) { in sumo_parse_power_table()
1500 kfree(rdev->pm.dpm.ps); in sumo_parse_power_table()
1503 rdev->pm.dpm.ps[i].ps_priv = ps; in sumo_parse_power_table()
1515 &rdev->pm.dpm.ps[i], k, in sumo_parse_power_table()
1519 sumo_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in sumo_parse_power_table()
1798 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_print_power_state() local
1803 for (i = 0; i < ps->num_levels; i++) { in sumo_dpm_print_power_state()
1804 struct sumo_pl *pl = &ps->levels[i]; in sumo_dpm_print_power_state()
1817 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_debugfs_print_current_performance_level() local
1829 } else if (current_index >= ps->num_levels) { in sumo_dpm_debugfs_print_current_performance_level()
1832 pl = &ps->levels[current_index]; in sumo_dpm_debugfs_print_current_performance_level()
1844 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_get_current_sclk() local
1853 } else if (current_index >= ps->num_levels) { in sumo_dpm_get_current_sclk()
1856 pl = &ps->levels[current_index]; in sumo_dpm_get_current_sclk()
1875 kfree(rdev->pm.dpm.ps[i].ps_priv); in sumo_dpm_fini()
1877 kfree(rdev->pm.dpm.ps); in sumo_dpm_fini()
1904 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_force_performance_level() local
1907 if (ps->num_levels <= 1) in sumo_dpm_force_performance_level()
1913 sumo_power_level_enable(rdev, ps->num_levels - 1, true); in sumo_dpm_force_performance_level()
1914 sumo_set_forced_level(rdev, ps->num_levels - 1); in sumo_dpm_force_performance_level()
1916 for (i = 0; i < ps->num_levels - 1; i++) { in sumo_dpm_force_performance_level()
1928 for (i = 1; i < ps->num_levels; i++) { in sumo_dpm_force_performance_level()
1935 for (i = 0; i < ps->num_levels; i++) { in sumo_dpm_force_performance_level()