1746 				     const struct atom_voltage_table *table,
2535 	struct radeon_cac_leakage_table *table =  in si_get_cac_std_voltage_max_min()  local
2541 	if (table == NULL)  in si_get_cac_std_voltage_max_min()
2547 	for (i = 0; i < table->count; i++) {  in si_get_cac_std_voltage_max_min()
2548 		if (table->entries[i].vddc > *max)  in si_get_cac_std_voltage_max_min()
2549 			*max = table->entries[i].vddc;  in si_get_cac_std_voltage_max_min()
2550 		if (table->entries[i].vddc < *min)  in si_get_cac_std_voltage_max_min()
2551 			*min = table->entries[i].vddc;  in si_get_cac_std_voltage_max_min()
2961 	struct radeon_vce_clock_voltage_dependency_table *table =  in si_get_vce_clock_voltage()  local
2965 	    (table && (table->count == 0))) {  in si_get_vce_clock_voltage()
2970 	for (i = 0; i < table->count; i++) {  in si_get_vce_clock_voltage()
2971 		if ((evclk <= table->entries[i].evclk) &&  in si_get_vce_clock_voltage()
2972 		    (ecclk <= table->entries[i].ecclk)) {  in si_get_vce_clock_voltage()
2973 			*voltage = table->entries[i].v;  in si_get_vce_clock_voltage()
2981 		*voltage = table->entries[table->count - 1].v;  in si_get_vce_clock_voltage()
3906 					      const struct atom_voltage_table *table,  in si_validate_phase_shedding_tables()  argument
3911 	if ((table == NULL) || (limits == NULL))  in si_validate_phase_shedding_tables()
3914 	data = table->mask_low;  in si_validate_phase_shedding_tables()
3923 	if (table->count != num_levels)  in si_validate_phase_shedding_tables()
4052 					  SISLANDS_SMC_STATETABLE *table)  in si_populate_smc_voltage_table()  argument
4057 		table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low);  in si_populate_smc_voltage_table()
4061 					  SISLANDS_SMC_STATETABLE *table)  in si_populate_smc_voltage_tables()  argument
4077 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4078 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =  in si_populate_smc_voltage_tables()
4083 					table->maxVDDCIndexInPPTable = i;  in si_populate_smc_voltage_tables()
4090 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4092 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDCI] =  in si_populate_smc_voltage_tables()
4098 			si_populate_smc_voltage_table(rdev, &si_pi->mvdd_voltage_table, table);  in si_populate_smc_voltage_tables()
4100 			table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_MVDD] =  in si_populate_smc_voltage_tables()
4107 				si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);  in si_populate_smc_voltage_tables()
4109 				table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =  in si_populate_smc_voltage_tables()
4124 				     const struct atom_voltage_table *table,  in si_populate_voltage_value()  argument
4129 	for (i = 0; i < table->count; i++) {  in si_populate_voltage_value()
4130 		if (value <= table->entries[i].value) {  in si_populate_voltage_value()
4132 			voltage->value = cpu_to_be16(table->entries[i].value);  in si_populate_voltage_value()
4137 	if (i >= table->count)  in si_populate_voltage_value()
4380 					 SISLANDS_SMC_STATETABLE *table)  in si_populate_smc_initial_state()  argument
4389 	table->initialState.levels[0].mclk.vDLL_CNTL =  in si_populate_smc_initial_state()
4391 	table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =  in si_populate_smc_initial_state()
4393 	table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =  in si_populate_smc_initial_state()
4395 	table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =  in si_populate_smc_initial_state()
4397 	table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL =  in si_populate_smc_initial_state()
4399 	table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 =  in si_populate_smc_initial_state()
4401 	table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 =  in si_populate_smc_initial_state()
4403 	table->initialState.levels[0].mclk.vMPLL_SS =  in si_populate_smc_initial_state()
4405 	table->initialState.levels[0].mclk.vMPLL_SS2 =  in si_populate_smc_initial_state()
4408 	table->initialState.levels[0].mclk.mclk_value =  in si_populate_smc_initial_state()
4411 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =  in si_populate_smc_initial_state()
4413 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =  in si_populate_smc_initial_state()
4415 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =  in si_populate_smc_initial_state()
4417 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 =  in si_populate_smc_initial_state()
4419 	table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =  in si_populate_smc_initial_state()
4421 	table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2  =  in si_populate_smc_initial_state()
4424 	table->initialState.levels[0].sclk.sclk_value =  in si_populate_smc_initial_state()
4427 	table->initialState.levels[0].arbRefreshState =  in si_populate_smc_initial_state()
4430 	table->initialState.levels[0].ACIndex = 0;  in si_populate_smc_initial_state()
4434 					&table->initialState.levels[0].vddc);  in si_populate_smc_initial_state()
4440 					       &table->initialState.levels[0].vddc,  in si_populate_smc_initial_state()
4444 						      table->initialState.levels[0].vddc.index,  in si_populate_smc_initial_state()
4445 						      &table->initialState.levels[0].std_vddc);  in si_populate_smc_initial_state()
4452 					  &table->initialState.levels[0].vddci);  in si_populate_smc_initial_state()
4460 						 &table->initialState.levels[0].vddc);  in si_populate_smc_initial_state()
4462 	si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);  in si_populate_smc_initial_state()
4465 	table->initialState.levels[0].aT = cpu_to_be32(reg);  in si_populate_smc_initial_state()
4467 	table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);  in si_populate_smc_initial_state()
4469 	table->initialState.levels[0].gen2PCIE = (u8)si_pi->boot_pcie_gen;  in si_populate_smc_initial_state()
4472 		table->initialState.levels[0].strobeMode =  in si_populate_smc_initial_state()
4477 …	table->initialState.levels[0].mcFlags = SISLANDS_SMC_MC_EDC_RD_FLAG | SISLANDS_SMC_MC_EDC_WR_FLAG;  in si_populate_smc_initial_state()
4479 			table->initialState.levels[0].mcFlags =  0;  in si_populate_smc_initial_state()
4482 	table->initialState.levelCount = 1;  in si_populate_smc_initial_state()
4484 	table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;  in si_populate_smc_initial_state()
4486 	table->initialState.levels[0].dpm2.MaxPS = 0;  in si_populate_smc_initial_state()
4487 	table->initialState.levels[0].dpm2.NearTDPDec = 0;  in si_populate_smc_initial_state()
4488 	table->initialState.levels[0].dpm2.AboveSafeInc = 0;  in si_populate_smc_initial_state()
4489 	table->initialState.levels[0].dpm2.BelowSafeInc = 0;  in si_populate_smc_initial_state()
4490 	table->initialState.levels[0].dpm2.PwrEfficiencyRatio = 0;  in si_populate_smc_initial_state()
4493 	table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg);  in si_populate_smc_initial_state()
4496 	table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);  in si_populate_smc_initial_state()
4502 				      SISLANDS_SMC_STATETABLE *table)  in si_populate_smc_acpi_state()  argument
4521 	table->ACPIState = table->initialState;  in si_populate_smc_acpi_state()
4523 	table->ACPIState.flags &= ~PPSMC_SWSTATE_FLAG_DC;  in si_populate_smc_acpi_state()
4527 						pi->acpi_vddc, &table->ACPIState.levels[0].vddc);  in si_populate_smc_acpi_state()
4532 						       &table->ACPIState.levels[0].vddc, &std_vddc);  in si_populate_smc_acpi_state()
4535 							      table->ACPIState.levels[0].vddc.index,  in si_populate_smc_acpi_state()
4536 							      &table->ACPIState.levels[0].std_vddc);  in si_populate_smc_acpi_state()
4538 		table->ACPIState.levels[0].gen2PCIE = si_pi->acpi_pcie_gen;  in si_populate_smc_acpi_state()
4546 							 &table->ACPIState.levels[0].vddc);  in si_populate_smc_acpi_state()
4550 						pi->min_vddc_in_table, &table->ACPIState.levels[0].vddc);  in si_populate_smc_acpi_state()
4555 						       &table->ACPIState.levels[0].vddc, &std_vddc);  in si_populate_smc_acpi_state()
4559 							      table->ACPIState.levels[0].vddc.index,  in si_populate_smc_acpi_state()
4560 							      &table->ACPIState.levels[0].std_vddc);  in si_populate_smc_acpi_state()
4562 		table->ACPIState.levels[0].gen2PCIE = (u8)r600_get_pcie_gen_support(rdev,  in si_populate_smc_acpi_state()
4573 							 &table->ACPIState.levels[0].vddc);  in si_populate_smc_acpi_state()
4580 						  &table->ACPIState.levels[0].vddci);  in si_populate_smc_acpi_state()
4591 	table->ACPIState.levels[0].mclk.vDLL_CNTL =  in si_populate_smc_acpi_state()
4593 	table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL =  in si_populate_smc_acpi_state()
4595 	table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =  in si_populate_smc_acpi_state()
4597 	table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =  in si_populate_smc_acpi_state()
4599 	table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL =  in si_populate_smc_acpi_state()
4601 	table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL_1 =  in si_populate_smc_acpi_state()
4603 	table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL_2 =  in si_populate_smc_acpi_state()
4605 	table->ACPIState.levels[0].mclk.vMPLL_SS =  in si_populate_smc_acpi_state()
4607 	table->ACPIState.levels[0].mclk.vMPLL_SS2 =  in si_populate_smc_acpi_state()
4610 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =  in si_populate_smc_acpi_state()
4612 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =  in si_populate_smc_acpi_state()
4614 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =  in si_populate_smc_acpi_state()
4616 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 =  in si_populate_smc_acpi_state()
4619 	table->ACPIState.levels[0].mclk.mclk_value = 0;  in si_populate_smc_acpi_state()
4620 	table->ACPIState.levels[0].sclk.sclk_value = 0;  in si_populate_smc_acpi_state()
4622 	si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);  in si_populate_smc_acpi_state()
4625 		table->ACPIState.levels[0].ACIndex = 0;  in si_populate_smc_acpi_state()
4627 	table->ACPIState.levels[0].dpm2.MaxPS = 0;  in si_populate_smc_acpi_state()
4628 	table->ACPIState.levels[0].dpm2.NearTDPDec = 0;  in si_populate_smc_acpi_state()
4629 	table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;  in si_populate_smc_acpi_state()
4630 	table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;  in si_populate_smc_acpi_state()
4631 	table->ACPIState.levels[0].dpm2.PwrEfficiencyRatio = 0;  in si_populate_smc_acpi_state()
4634 	table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg);  in si_populate_smc_acpi_state()
4637 	table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);  in si_populate_smc_acpi_state()
4712 	SISLANDS_SMC_STATETABLE  *table = &si_pi->smc_statetable;  in si_init_smc_table()  local
4717 	si_populate_smc_voltage_tables(rdev, table);  in si_init_smc_table()
4722 		table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_INTERNAL;  in si_init_smc_table()
4725 		table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_NONE;  in si_init_smc_table()
4728 		table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL;  in si_init_smc_table()
4733 		table->systemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC;  in si_init_smc_table()
4737 			table->systemFlags |= PPSMC_SYSTEMFLAG_REGULATOR_HOT;  in si_init_smc_table()
4741 		table->systemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;  in si_init_smc_table()
4744 		table->systemFlags |= PPSMC_SYSTEMFLAG_GDDR5;  in si_init_smc_table()
4747 		table->extraFlags |= PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH;  in si_init_smc_table()
4750 		table->systemFlags |= PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO;  in si_init_smc_table()
4756 	ret = si_populate_smc_initial_state(rdev, radeon_boot_state, table);  in si_init_smc_table()
4760 	ret = si_populate_smc_acpi_state(rdev, table);  in si_init_smc_table()
4764 	table->driverState = table->initialState;  in si_init_smc_table()
4772 		ret = si_populate_ulv_state(rdev, &table->ULVState);  in si_init_smc_table()
4786 		table->ULVState = table->initialState;  in si_init_smc_table()
4790 				    (u8 *)table, sizeof(SISLANDS_SMC_STATETABLE),  in si_init_smc_table()
5369 				       struct si_mc_reg_table *table)  in si_set_mc_special_registers()  argument
5375 	for (i = 0, j = table->last; i < table->last; i++) {  in si_set_mc_special_registers()
5378 		switch (table->mc_reg_address[i].s1 << 2) {  in si_set_mc_special_registers()
5381 			table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2;  in si_set_mc_special_registers()
5382 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;  in si_set_mc_special_registers()
5383 			for (k = 0; k < table->num_entries; k++)  in si_set_mc_special_registers()
5384 				table->mc_reg_table_entry[k].mc_data[j] =  in si_set_mc_special_registers()
5386 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);  in si_set_mc_special_registers()
5392 			table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2;  in si_set_mc_special_registers()
5393 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;  in si_set_mc_special_registers()
5394 			for (k = 0; k < table->num_entries; k++) {  in si_set_mc_special_registers()
5395 				table->mc_reg_table_entry[k].mc_data[j] =  in si_set_mc_special_registers()
5397 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);  in si_set_mc_special_registers()
5399 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;  in si_set_mc_special_registers()
5406 				table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2;  in si_set_mc_special_registers()
5407 				table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2;  in si_set_mc_special_registers()
5408 				for (k = 0; k < table->num_entries; k++)  in si_set_mc_special_registers()
5409 					table->mc_reg_table_entry[k].mc_data[j] =  in si_set_mc_special_registers()
5410 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;  in si_set_mc_special_registers()
5418 			table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2;  in si_set_mc_special_registers()
5419 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;  in si_set_mc_special_registers()
5420 			for(k = 0; k < table->num_entries; k++)  in si_set_mc_special_registers()
5421 				table->mc_reg_table_entry[k].mc_data[j] =  in si_set_mc_special_registers()
5423 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);  in si_set_mc_special_registers()
5433 	table->last = j;  in si_set_mc_special_registers()
5493 static void si_set_valid_flag(struct si_mc_reg_table *table)  in si_set_valid_flag()  argument
5497 	for (i = 0; i < table->last; i++) {  in si_set_valid_flag()
5498 		for (j = 1; j < table->num_entries; j++) {  in si_set_valid_flag()
5499 			if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) {  in si_set_valid_flag()
5500 				table->valid_flag |= 1 << i;  in si_set_valid_flag()
5507 static void si_set_s0_mc_reg_index(struct si_mc_reg_table *table)  in si_set_s0_mc_reg_index()  argument
5512 	for (i = 0; i < table->last; i++)  in si_set_s0_mc_reg_index()
5513 		table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ?  in si_set_s0_mc_reg_index()
5514 			address : table->mc_reg_address[i].s1;  in si_set_s0_mc_reg_index()
5518 static int si_copy_vbios_mc_reg_table(struct atom_mc_reg_table *table,  in si_copy_vbios_mc_reg_table()  argument
5523 	if (table->last > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)  in si_copy_vbios_mc_reg_table()
5525 	if (table->num_entries > MAX_AC_TIMING_ENTRIES)  in si_copy_vbios_mc_reg_table()
5528 	for (i = 0; i < table->last; i++)  in si_copy_vbios_mc_reg_table()
5529 		si_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1;  in si_copy_vbios_mc_reg_table()
5530 	si_table->last = table->last;  in si_copy_vbios_mc_reg_table()
5532 	for (i = 0; i < table->num_entries; i++) {  in si_copy_vbios_mc_reg_table()
5534 			table->mc_reg_table_entry[i].mclk_max;  in si_copy_vbios_mc_reg_table()
5535 		for (j = 0; j < table->last; j++) {  in si_copy_vbios_mc_reg_table()
5537 				table->mc_reg_table_entry[i].mc_data[j];  in si_copy_vbios_mc_reg_table()
5540 	si_table->num_entries = table->num_entries;  in si_copy_vbios_mc_reg_table()
5548 	struct atom_mc_reg_table *table;  in si_initialize_mc_reg_table()  local
5553 	table = kzalloc(sizeof(struct atom_mc_reg_table), GFP_KERNEL);  in si_initialize_mc_reg_table()
5554 	if (!table)  in si_initialize_mc_reg_table()
5572         ret = radeon_atom_init_mc_reg_table(rdev, module_index, table);  in si_initialize_mc_reg_table()
5576         ret = si_copy_vbios_mc_reg_table(table, si_table);  in si_initialize_mc_reg_table()
5589 	kfree(table);  in si_initialize_mc_reg_table()
5881 							     struct radeon_clock_voltage_dependency_table *table)  in si_patch_single_dependency_table_based_on_leakage()  argument
5887 	if (table) {  in si_patch_single_dependency_table_based_on_leakage()
5888 		for (i = 0; i < table->count; i++) {  in si_patch_single_dependency_table_based_on_leakage()
5890 									  table->entries[i].v,  in si_patch_single_dependency_table_based_on_leakage()
5893 				table->entries[i].v = leakage_voltage;  in si_patch_single_dependency_table_based_on_leakage()
5903 		for (j = (table->count - 2); j >= 0; j--) {  in si_patch_single_dependency_table_based_on_leakage()
5904 			table->entries[j].v = (table->entries[j].v <= table->entries[j + 1].v) ?  in si_patch_single_dependency_table_based_on_leakage()
5905 				table->entries[j].v : table->entries[j + 1].v;  in si_patch_single_dependency_table_based_on_leakage()