2307 	if (state->performance_level_count == 0)  in si_populate_power_containment_values()
2310 	if (smc_state->levelCount != state->performance_level_count)  in si_populate_power_containment_values()
2321 	for (i = 1; i < state->performance_level_count; i++) {  in si_populate_power_containment_values()
2389 	if (state->performance_level_count == 0)  in si_populate_sq_ramping_values()
2392 	if (smc_state->levelCount != state->performance_level_count)  in si_populate_sq_ramping_values()
2413 	for (i = 0; i < state->performance_level_count; i++) {  in si_populate_sq_ramping_values()
3043 	for (i = ps->performance_level_count - 2; i >= 0; i--) {  in si_apply_state_adjust_rules()
3048 		for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3068 	for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3094 		mclk  = ps->performance_levels[ps->performance_level_count - 1].mclk;  in si_apply_state_adjust_rules()
3095 		vddci = ps->performance_levels[ps->performance_level_count - 1].vddci;  in si_apply_state_adjust_rules()
3102 		sclk = ps->performance_levels[ps->performance_level_count - 1].sclk;  in si_apply_state_adjust_rules()
3103 		vddc = ps->performance_levels[ps->performance_level_count - 1].vddc;  in si_apply_state_adjust_rules()
3124 		for (i = 1; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3128 		for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3133 		for (i = 1; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3143 		for (i = 1; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3147 		for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3152 		for (i = 1; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3160         for (i = 0; i < ps->performance_level_count; i++)  in si_apply_state_adjust_rules()
3164 	for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3181 	for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3189 	for (i = 0; i < ps->performance_level_count; i++) {  in si_apply_state_adjust_rules()
3418 	u32 levels = ps->performance_level_count;  in si_dpm_force_performance_level()
4340 	for (i = 0; i < state->performance_level_count; i++) {  in si_do_program_memory_timing_parameters()
4982 	for (i = 0; i < ps->performance_level_count - 1; i++)  in si_populate_smc_sp()
4985 	smc_state->levels[ps->performance_level_count - 1].bSP =  in si_populate_smc_sp()
5109 	if (state->performance_level_count >= 9)  in si_populate_smc_t()
5112 	if (state->performance_level_count < 2) {  in si_populate_smc_t()
5120 	for (i = 0; i <= state->performance_level_count - 2; i++) {  in si_populate_smc_t()
5138 		high_bsp = (i == state->performance_level_count - 2) ?  in si_populate_smc_t()
5213 	if (state->performance_level_count > SISLANDS_MAX_HARDWARE_POWERLEVELS)  in si_convert_power_state_to_smc()
5216 	threshold = state->performance_levels[state->performance_level_count-1].sclk * 100 / 100;  in si_convert_power_state_to_smc()
5230 	for (i = 0; i < state->performance_level_count; i++) {  in si_convert_power_state_to_smc()
5290 		((new_state->performance_level_count - 1) *  in si_upload_sw_state()
5656 	for (i = 0; i < state->performance_level_count; i++) {  in si_convert_mc_reg_table_to_smc()
5718 				    sizeof(SMC_SIslands_MCRegisterSet) * new_state->performance_level_count,  in si_upload_mc_reg_table()
5738 	for (i = 0; i < state->performance_level_count; i++) {  in si_get_maximum_link_speed()
6754 	ps->performance_level_count = index + 1;  in si_parse_pplib_clock_info()
7099 	if (current_index >= ps->performance_level_count) {  in si_dpm_debugfs_print_current_performance_level()
7119 	if (current_index >= ps->performance_level_count) {  in si_dpm_get_current_sclk()
7137 	if (current_index >= ps->performance_level_count) {  in si_dpm_get_current_mclk()