2289 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_power_containment_values()  local
2348 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
2357 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
3684 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_program_ds_registers()  local
3687 	if (eg_pi->sclk_deep_sleep) {  in si_program_ds_registers()
3973 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_construct_voltage_tables()  local
3979 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3983 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3986 								 &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3990 						&eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3997 	if (eg_pi->vddci_control) {  in si_construct_voltage_tables()
3999 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4003 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
4006 								 &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4011 						&eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4064 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4076 		if (eg_pi->vddc_voltage_table.count) {  in si_populate_smc_voltage_tables()
4077 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4079 				cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4081 			for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) {  in si_populate_smc_voltage_tables()
4082 				if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {  in si_populate_smc_voltage_tables()
4089 		if (eg_pi->vddci_voltage_table.count) {  in si_populate_smc_voltage_tables()
4090 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4093 				cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4384 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_initial_state()  local
4432 	ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_initial_state()
4448 	if (eg_pi->vddci_control)  in si_populate_smc_initial_state()
4450 					  &eg_pi->vddci_voltage_table,  in si_populate_smc_initial_state()
4505 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4526 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4549 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4577 		if (eg_pi->acpi_vddci)  in si_populate_smc_acpi_state()
4578 			si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_populate_smc_acpi_state()
4579 						  eg_pi->acpi_vddci,  in si_populate_smc_acpi_state()
4624 	if (eg_pi->dynamic_ac_timing)  in si_populate_smc_acpi_state()
4645 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_ulv_state()  local
4654 		if (eg_pi->sclk_deep_sleep) {  in si_populate_ulv_state()
4994 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_level_to_smc()  local
5001 	if (eg_pi->pcie_performance_request &&  in si_convert_power_level_to_smc()
5015 	    !eg_pi->uvd_enabled &&  in si_convert_power_level_to_smc()
5028 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in si_convert_power_level_to_smc()
5058 					&eg_pi->vddc_voltage_table,  in si_convert_power_level_to_smc()
5073 	if (eg_pi->vddci_control) {  in si_convert_power_level_to_smc()
5074 		ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_convert_power_level_to_smc()
5205 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5219 		eg_pi->uvd_enabled = true;  in si_convert_power_state_to_smc()
5220 		if (eg_pi->smu_uvd_hs)  in si_convert_power_state_to_smc()
5223 		eg_pi->uvd_enabled = false;  in si_convert_power_state_to_smc()
5231 		if (eg_pi->sclk_deep_sleep) {  in si_convert_power_state_to_smc()
5256 		if (eg_pi->dynamic_ac_timing)  in si_convert_power_state_to_smc()
5824 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
5826 	if (eg_pi->sclk_deep_sleep) {
6362 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_enable()  local
6380 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6383 			eg_pi->dynamic_ac_timing = false;  in si_dpm_enable()
6426 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6532 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_pre_set_power_state()  local
6538 	si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);  in si_dpm_pre_set_power_state()
6571 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_set_power_state()  local
6572 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_set_power_state()
6573 	struct radeon_ps *old_ps = &eg_pi->current_rps;  in si_dpm_set_power_state()
6586 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6619 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_set_power_state()
6645 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6674 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_post_set_power_state()  local
6675 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_post_set_power_state()
6747 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6777 		eg_pi->acpi_vddci = pl->vddci;  in si_parse_pplib_clock_info()
6912 	struct evergreen_power_info *eg_pi;  in si_dpm_init()  local
6924 	eg_pi = &ni_pi->eg;  in si_dpm_init()
6925 	pi = &eg_pi->rv7xx;  in si_dpm_init()
6942 	eg_pi->acpi_vddci = 0;  in si_dpm_init()
6986 	eg_pi->smu_uvd_hs = false;  in si_dpm_init()
6994 	eg_pi->mclk_edc_wr_enable_threshold = 40000;  in si_dpm_init()
6996 	ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;  in si_dpm_init()
7014 	eg_pi->vddci_control =  in si_dpm_init()
7017 	if (!eg_pi->vddci_control)  in si_dpm_init()
7034 	eg_pi->sclk_deep_sleep = true;  in si_dpm_init()
7042 	eg_pi->dynamic_ac_timing = true;  in si_dpm_init()
7044 	eg_pi->light_sleep = true;  in si_dpm_init()
7046 	eg_pi->pcie_performance_request =  in si_dpm_init()
7049 	eg_pi->pcie_performance_request = false;  in si_dpm_init()
7091 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_debugfs_print_current_performance_level()  local
7092 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()
7111 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_sclk()  local
7112 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()
7129 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_mclk()  local
7130 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()