Lines Matching refs:pi
57 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi() local
59 return pi; in rv770_get_pi()
64 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi() local
66 return pi; in evergreen_get_pi()
72 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_bif_dynamic_pcie_gen2() local
81 if (!pi->boot_in_gen2) { in rv770_enable_bif_dynamic_pcie_gen2()
146 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_mg_clock_gating_enable() local
159 if (pi->mgcgtssm) in rv770_mg_clock_gating_enable()
238 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
241 pi->soft_regs_start + reg_offset,
242 value, pi->sram_end);
249 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_write_smc_soft_register() local
252 pi->soft_regs_start + reg_offset, in rv770_write_smc_soft_register()
253 value, pi->sram_end); in rv770_write_smc_soft_register()
261 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_t() local
272 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
273 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
274 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
275 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
277 l[1] = (u8)(pi->lmp - (int)pi->lmp * a_n / a_d); in rv770_populate_smc_t()
278 r[0] = (u8)(pi->rlp + (100 - (int)pi->rlp) * a_n / a_d); in rv770_populate_smc_t()
280 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
281 (R600_AH_DFLT - pi->rmp); in rv770_populate_smc_t()
282 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
283 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
285 l[2] = (u8)(pi->lhp - (int)pi->lhp * a_n / a_d); in rv770_populate_smc_t()
286 r[1] = (u8)(pi->rmp + (100 - (int)pi->rmp) * a_n / a_d); in rv770_populate_smc_t()
289 a_t = CG_R(r[i] * pi->bsp / 200) | CG_L(l[i] * pi->bsp / 200); in rv770_populate_smc_t()
293 a_t = CG_R(r[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200) | in rv770_populate_smc_t()
294 CG_L(l[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200); in rv770_populate_smc_t()
306 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_sp() local
310 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 cpu_to_be32(pi->psp); in rv770_populate_smc_sp()
390 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mclk_value() local
393 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()
395 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()
397 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()
399 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()
401 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()
402 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv770_populate_mclk_value()
419 pi->mem_gddr5, in rv770_populate_mclk_value()
444 if (pi->mem_gddr5) { in rv770_populate_mclk_value()
447 pi->mem_gddr5, in rv770_populate_mclk_value()
488 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_sclk_value() local
491 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()
493 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_sclk_value()
495 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_sclk_value()
497 pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv770_populate_sclk_value()
499 pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv770_populate_sclk_value()
538 if (pi->sclk_ss) { in rv770_populate_sclk_value()
569 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_vddc_value() local
572 if (!pi->voltage_control) { in rv770_populate_vddc_value()
578 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_vddc_value()
579 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
580 voltage->index = pi->vddc_table[i].vddc_index; in rv770_populate_vddc_value()
586 if (i == pi->valid_vddc_entries) in rv770_populate_vddc_value()
595 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mvdd_value() local
597 if (!pi->mvdd_control) { in rv770_populate_mvdd_value()
603 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
619 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_convert_power_level_to_smc() local
622 level->gen2PCIE = pi->pcie_gen2 ? in rv770_convert_power_level_to_smc()
641 if (pi->mem_gddr5) { in rv770_convert_power_level_to_smc()
642 if (pl->mclk <= pi->mclk_strobe_mode_threshold) in rv770_convert_power_level_to_smc()
648 if (pl->mclk > pi->mclk_edc_enable_threshold) in rv770_convert_power_level_to_smc()
743 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_memory_timing_parameters() local
757 STATE0(64 * high_clock / pi->boot_sclk) | in rv770_program_memory_timing_parameters()
764 POWERMODE0(rv770_calculate_memory_refresh_rate(rdev, pi->boot_sclk)) | in rv770_program_memory_timing_parameters()
783 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_spread_spectrum() local
786 if (pi->sclk_ss) in rv770_enable_spread_spectrum()
789 if (pi->mclk_ss) { in rv770_enable_spread_spectrum()
807 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_mpll_timing_parameters() local
809 if ((rdev->family == CHIP_RV770) && !pi->mem_gddr5) { in rv770_program_mpll_timing_parameters()
811 (MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) | in rv770_program_mpll_timing_parameters()
818 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_setup_bsp() local
821 r600_calculate_u_and_p(pi->asi, in rv770_setup_bsp()
824 &pi->bsp, in rv770_setup_bsp()
825 &pi->bsu); in rv770_setup_bsp()
827 r600_calculate_u_and_p(pi->pasi, in rv770_setup_bsp()
830 &pi->pbsp, in rv770_setup_bsp()
831 &pi->pbsu); in rv770_setup_bsp()
833 pi->dsp = BSP(pi->bsp) | BSU(pi->bsu); in rv770_setup_bsp()
834 pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu); in rv770_setup_bsp()
836 WREG32(CG_BSP, pi->dsp); in rv770_setup_bsp()
890 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_vc() local
892 WREG32(CG_FTV, pi->vrc); in rv770_program_vc()
902 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_firmware() local
908 ret = rv770_load_smc_ucode(rdev, pi->sram_end); in rv770_upload_firmware()
918 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_acpi_state() local
921 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_smc_acpi_state()
923 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_smc_acpi_state()
925 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_smc_acpi_state()
927 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_smc_acpi_state()
929 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_smc_acpi_state()
931 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_smc_acpi_state()
933 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_smc_acpi_state()
941 if (pi->acpi_vddc) { in rv770_populate_smc_acpi_state()
942 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv770_populate_smc_acpi_state()
944 if (pi->pcie_gen2) { in rv770_populate_smc_acpi_state()
945 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
951 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
956 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv770_populate_smc_acpi_state()
1009 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_initial_mvdd_value() local
1011 if ((pi->s0_vid_lower_smio_cntl & pi->mvdd_mask_low) == in rv770_populate_initial_mvdd_value()
1012 (pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low) ) { in rv770_populate_initial_mvdd_value()
1028 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_initial_state() local
1032 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl); in rv770_populate_smc_initial_state()
1034 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2); in rv770_populate_smc_initial_state()
1036 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl); in rv770_populate_smc_initial_state()
1038 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2); in rv770_populate_smc_initial_state()
1040 cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl); in rv770_populate_smc_initial_state()
1042 cpu_to_be32(pi->clk_regs.rv770.dll_cntl); in rv770_populate_smc_initial_state()
1045 cpu_to_be32(pi->clk_regs.rv770.mpll_ss1); in rv770_populate_smc_initial_state()
1047 cpu_to_be32(pi->clk_regs.rv770.mpll_ss2); in rv770_populate_smc_initial_state()
1053 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl); in rv770_populate_smc_initial_state()
1055 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2); in rv770_populate_smc_initial_state()
1057 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3); in rv770_populate_smc_initial_state()
1059 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum); in rv770_populate_smc_initial_state()
1061 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2); in rv770_populate_smc_initial_state()
1080 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_initial_state()
1082 if (pi->boot_in_gen2) in rv770_populate_smc_initial_state()
1092 if (pi->mem_gddr5) { in rv770_populate_smc_initial_state()
1093 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold) in rv770_populate_smc_initial_state()
1099 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold) in rv770_populate_smc_initial_state()
1117 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_vddc_table() local
1120 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_smc_vddc_table()
1121 table->highSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1122 pi->vddc_table[i].high_smio; in rv770_populate_smc_vddc_table()
1123 table->lowSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1124 cpu_to_be32(pi->vddc_table[i].low_smio); in rv770_populate_smc_vddc_table()
1129 cpu_to_be32(pi->vddc_mask_low); in rv770_populate_smc_vddc_table()
1132 ((i < pi->valid_vddc_entries) && in rv770_populate_smc_vddc_table()
1133 (pi->max_vddc_in_table > in rv770_populate_smc_vddc_table()
1134 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
1138 pi->vddc_table[i].vddc_index; in rv770_populate_smc_vddc_table()
1146 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_mvdd_table() local
1148 if (pi->mvdd_control) { in rv770_populate_smc_mvdd_table()
1150 cpu_to_be32(pi->mvdd_low_smio[MVDD_HIGH_INDEX]); in rv770_populate_smc_mvdd_table()
1152 cpu_to_be32(pi->mvdd_low_smio[MVDD_LOW_INDEX]); in rv770_populate_smc_mvdd_table()
1156 cpu_to_be32(pi->mvdd_mask_low); in rv770_populate_smc_mvdd_table()
1165 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_init_smc_table() local
1167 RV770_SMC_STATETABLE *table = &pi->smc_statetable; in rv770_init_smc_table()
1172 pi->boot_sclk = boot_state->low.sclk; in rv770_init_smc_table()
1204 if (pi->mem_gddr5) in rv770_init_smc_table()
1226 pi->state_table_start, in rv770_init_smc_table()
1229 pi->sram_end); in rv770_init_smc_table()
1234 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_construct_vddc_table() local
1252 pi->vddc_table[i].vddc = (u16)(min + i * step); in rv770_construct_vddc_table()
1254 pi->vddc_table[i].vddc, in rv770_construct_vddc_table()
1257 pi->vddc_table[i].low_smio = gpio_pins & gpio_mask; in rv770_construct_vddc_table()
1258 pi->vddc_table[i].high_smio = 0; in rv770_construct_vddc_table()
1259 pi->vddc_mask_low = gpio_mask; in rv770_construct_vddc_table()
1261 if ((pi->vddc_table[i].low_smio != in rv770_construct_vddc_table()
1262 pi->vddc_table[i - 1].low_smio ) || in rv770_construct_vddc_table()
1263 (pi->vddc_table[i].high_smio != in rv770_construct_vddc_table()
1264 pi->vddc_table[i - 1].high_smio)) in rv770_construct_vddc_table()
1267 pi->vddc_table[i].vddc_index = vddc_index; in rv770_construct_vddc_table()
1270 pi->valid_vddc_entries = (u8)steps; in rv770_construct_vddc_table()
1285 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_pin_configuration() local
1291 pi->mvdd_mask_low = gpio_mask; in rv770_get_mvdd_pin_configuration()
1292 pi->mvdd_low_smio[MVDD_HIGH_INDEX] = in rv770_get_mvdd_pin_configuration()
1298 pi->mvdd_low_smio[MVDD_LOW_INDEX] = in rv770_get_mvdd_pin_configuration()
1311 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_configuration() local
1318 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1322 pi->mvdd_split_frequency = in rv770_get_mvdd_configuration()
1325 if (pi->mvdd_split_frequency == 0) { in rv770_get_mvdd_configuration()
1326 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1385 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_sw_state() local
1386 u16 address = pi->state_table_start + in rv770_upload_sw_state()
1397 pi->sram_end); in rv770_upload_sw_state()
1519 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_clock_registers() local
1521 pi->clk_regs.rv770.cg_spll_func_cntl = in rv770_read_clock_registers()
1523 pi->clk_regs.rv770.cg_spll_func_cntl_2 = in rv770_read_clock_registers()
1525 pi->clk_regs.rv770.cg_spll_func_cntl_3 = in rv770_read_clock_registers()
1527 pi->clk_regs.rv770.cg_spll_spread_spectrum = in rv770_read_clock_registers()
1529 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv770_read_clock_registers()
1531 pi->clk_regs.rv770.mpll_ad_func_cntl = in rv770_read_clock_registers()
1533 pi->clk_regs.rv770.mpll_ad_func_cntl_2 = in rv770_read_clock_registers()
1535 pi->clk_regs.rv770.mpll_dq_func_cntl = in rv770_read_clock_registers()
1537 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv770_read_clock_registers()
1539 pi->clk_regs.rv770.mclk_pwrmgt_cntl = in rv770_read_clock_registers()
1541 pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL); in rv770_read_clock_registers()
1556 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_voltage_smio_registers() local
1558 pi->s0_vid_lower_smio_cntl = in rv770_read_voltage_smio_registers()
1564 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_reset_smio_status() local
1582 vid_smio_cntl = pi->s0_vid_lower_smio_cntl; in rv770_reset_smio_status()
1592 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_memory_type() local
1599 pi->mem_gddr5 = true; in rv770_get_memory_type()
1601 pi->mem_gddr5 = false; in rv770_get_memory_type()
1607 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_pcie_gen2_status() local
1614 pi->pcie_gen2 = true; in rv770_get_pcie_gen2_status()
1616 pi->pcie_gen2 = false; in rv770_get_pcie_gen2_status()
1618 if (pi->pcie_gen2) { in rv770_get_pcie_gen2_status()
1620 pi->boot_in_gen2 = true; in rv770_get_pcie_gen2_status()
1622 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1624 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1630 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1632 if (pi->gfx_clock_gating) {
1649 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1663 if (pi->gfx_clock_gating)
1672 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mclk_odt_threshold() local
1676 pi->mclk_odt_threshold = 0; in rv770_get_mclk_odt_threshold()
1686 pi->mclk_odt_threshold = 30000; in rv770_get_mclk_odt_threshold()
1692 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_max_vddc() local
1696 pi->max_vddc = 0; in rv770_get_max_vddc()
1698 pi->max_vddc = vddc; in rv770_get_max_vddc()
1748 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_before_state_switch() local
1754 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_before_state_switch()
1757 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1760 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1777 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_after_state_switch() local
1783 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_after_state_switch()
1786 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1789 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1804 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_retrieve_odt_values() local
1806 if (pi->mclk_odt_threshold == 0) in rv770_retrieve_odt_values()
1815 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_set_dpm_event_sources() local
1843 if (pi->thermal_protection) in rv770_set_dpm_event_sources()
1854 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_auto_throttle_source() local
1857 if (!(pi->active_auto_throttle_sources & (1 << source))) { in rv770_enable_auto_throttle_source()
1858 pi->active_auto_throttle_sources |= 1 << source; in rv770_enable_auto_throttle_source()
1859 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1862 if (pi->active_auto_throttle_sources & (1 << source)) { in rv770_enable_auto_throttle_source()
1863 pi->active_auto_throttle_sources &= ~(1 << source); in rv770_enable_auto_throttle_source()
1864 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1896 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_enable() local
1900 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1906 if (pi->voltage_control) { in rv770_dpm_enable()
1915 if (pi->dcodt) in rv770_dpm_enable()
1918 if (pi->mvdd_control) { in rv770_dpm_enable()
1931 if (pi->thermal_protection) in rv770_dpm_enable()
1944 if (pi->dynamic_pcie_gen2) in rv770_dpm_enable()
1966 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1969 if (pi->mg_clock_gating) in rv770_dpm_enable()
2001 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_disable() local
2008 if (pi->thermal_protection) in rv770_dpm_disable()
2013 if (pi->dynamic_pcie_gen2) in rv770_dpm_disable()
2022 if (pi->gfx_clock_gating) in rv770_dpm_disable()
2025 if (pi->mg_clock_gating) in rv770_dpm_disable()
2039 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_set_power_state() local
2061 if (pi->dcodt) in rv770_dpm_set_power_state()
2073 if (pi->dcodt) in rv770_dpm_set_power_state()
2083 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
2087 if (pi->dcodt)
2090 if (pi->dcodt)
2097 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_setup_asic() local
2102 if (pi->dcodt) in rv770_dpm_setup_asic()
2178 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv7xx_parse_pplib_clock_info() local
2221 if (pi->max_vddc) in rv7xx_parse_pplib_clock_info()
2222 pl->vddc = pi->max_vddc; in rv7xx_parse_pplib_clock_info()
2226 pi->acpi_vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2230 pi->acpi_pcie_gen2 = true; in rv7xx_parse_pplib_clock_info()
2232 pi->acpi_pcie_gen2 = false; in rv7xx_parse_pplib_clock_info()
2242 if (pi->min_vddc_in_table > pl->vddc) in rv7xx_parse_pplib_clock_info()
2243 pi->min_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2245 if (pi->max_vddc_in_table < pl->vddc) in rv7xx_parse_pplib_clock_info()
2246 pi->max_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2329 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_engine_memory_ss() local
2332 pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2334 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2337 if (pi->sclk_ss || pi->mclk_ss) in rv770_get_engine_memory_ss()
2338 pi->dynamic_ss = true; in rv770_get_engine_memory_ss()
2340 pi->dynamic_ss = false; in rv770_get_engine_memory_ss()
2345 struct rv7xx_power_info *pi; in rv770_dpm_init() local
2349 pi = kzalloc(sizeof(struct rv7xx_power_info), GFP_KERNEL); in rv770_dpm_init()
2350 if (pi == NULL) in rv770_dpm_init()
2352 rdev->pm.dpm.priv = pi; in rv770_dpm_init()
2356 pi->acpi_vddc = 0; in rv770_dpm_init()
2357 pi->min_vddc_in_table = 0; in rv770_dpm_init()
2358 pi->max_vddc_in_table = 0; in rv770_dpm_init()
2376 pi->ref_div = dividers.ref_div + 1; in rv770_dpm_init()
2378 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in rv770_dpm_init()
2380 pi->mclk_strobe_mode_threshold = 30000; in rv770_dpm_init()
2381 pi->mclk_edc_enable_threshold = 30000; in rv770_dpm_init()
2383 pi->rlp = RV770_RLP_DFLT; in rv770_dpm_init()
2384 pi->rmp = RV770_RMP_DFLT; in rv770_dpm_init()
2385 pi->lhp = RV770_LHP_DFLT; in rv770_dpm_init()
2386 pi->lmp = RV770_LMP_DFLT; in rv770_dpm_init()
2388 pi->voltage_control = in rv770_dpm_init()
2391 pi->mvdd_control = in rv770_dpm_init()
2396 pi->asi = RV770_ASI_DFLT; in rv770_dpm_init()
2397 pi->pasi = RV770_HASI_DFLT; in rv770_dpm_init()
2398 pi->vrc = RV770_VRC_DFLT; in rv770_dpm_init()
2400 pi->power_gating = false; in rv770_dpm_init()
2402 pi->gfx_clock_gating = true; in rv770_dpm_init()
2404 pi->mg_clock_gating = true; in rv770_dpm_init()
2405 pi->mgcgtssm = true; in rv770_dpm_init()
2407 pi->dynamic_pcie_gen2 = true; in rv770_dpm_init()
2410 pi->thermal_protection = true; in rv770_dpm_init()
2412 pi->thermal_protection = false; in rv770_dpm_init()
2414 pi->display_gap = true; in rv770_dpm_init()
2417 pi->dcodt = true; in rv770_dpm_init()
2419 pi->dcodt = false; in rv770_dpm_init()
2421 pi->ulps = true; in rv770_dpm_init()
2423 pi->mclk_stutter_mode_threshold = 0; in rv770_dpm_init()
2425 pi->sram_end = SMC_RAM_END; in rv770_dpm_init()
2426 pi->state_table_start = RV770_SMC_TABLE_ADDRESS; in rv770_dpm_init()
2427 pi->soft_regs_start = RV770_SMC_SOFT_REGISTERS_START; in rv770_dpm_init()