388 				     RV7XX_SMC_MCLK_VALUE *mclk)  in rv770_populate_mclk_value()  argument
473 	mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);  in rv770_populate_mclk_value()
474 	mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);  in rv770_populate_mclk_value()
475 	mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);  in rv770_populate_mclk_value()
476 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);  in rv770_populate_mclk_value()
477 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);  in rv770_populate_mclk_value()
478 	mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);  in rv770_populate_mclk_value()
479 	mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);  in rv770_populate_mclk_value()
592 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk,  in rv770_populate_mvdd_value()  argument
603 	if (mclk <= pi->mvdd_split_frequency) {  in rv770_populate_mvdd_value()
642 			if (pl->mclk <= pi->mclk_strobe_mode_threshold)  in rv770_convert_power_level_to_smc()
644 					rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;  in rv770_convert_power_level_to_smc()
648 			if (pl->mclk > pi->mclk_edc_enable_threshold)  in rv770_convert_power_level_to_smc()
654 						pl->mclk, &level->mclk);  in rv770_convert_power_level_to_smc()
657 						pl->mclk, &level->mclk);  in rv770_convert_power_level_to_smc()
660 						pl->mclk, &level->mclk);  in rv770_convert_power_level_to_smc()
669 	ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);  in rv770_convert_power_level_to_smc()
754 					    state->high.mclk);  in rv770_program_memory_timing_parameters()
982 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);  in rv770_populate_smc_acpi_state()
983 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);  in rv770_populate_smc_acpi_state()
984 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);  in rv770_populate_smc_acpi_state()
985 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);  in rv770_populate_smc_acpi_state()
987 	table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);  in rv770_populate_smc_acpi_state()
988 	table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);  in rv770_populate_smc_acpi_state()
990 	table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;  in rv770_populate_smc_acpi_state()
1031 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =  in rv770_populate_smc_initial_state()
1033 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =  in rv770_populate_smc_initial_state()
1035 	table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =  in rv770_populate_smc_initial_state()
1037 	table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =  in rv770_populate_smc_initial_state()
1039 	table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =  in rv770_populate_smc_initial_state()
1041 	table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =  in rv770_populate_smc_initial_state()
1044 	table->initialState.levels[0].mclk.mclk770.vMPLL_SS =  in rv770_populate_smc_initial_state()
1046 	table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =  in rv770_populate_smc_initial_state()
1049 	table->initialState.levels[0].mclk.mclk770.mclk_value =  in rv770_populate_smc_initial_state()
1050 		cpu_to_be32(initial_state->low.mclk);  in rv770_populate_smc_initial_state()
1093 			if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold)  in rv770_populate_smc_initial_state()
1095 					rv740_get_mclk_frequency_ratio(initial_state->low.mclk) | 0x10;  in rv770_populate_smc_initial_state()
1099 			if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold)  in rv770_populate_smc_initial_state()
1757 	if (current_state->high.mclk <= pi->mclk_odt_threshold)  in rv770_program_dcodt_before_state_switch()
1760 	if (new_state->high.mclk <= pi->mclk_odt_threshold)  in rv770_program_dcodt_before_state_switch()
1786 	if (current_state->high.mclk <= pi->mclk_odt_threshold)  in rv770_program_dcodt_after_state_switch()
1789 	if (new_state->high.mclk <= pi->mclk_odt_threshold)  in rv770_program_dcodt_after_state_switch()
2181 	u32 sclk, mclk;  in rv7xx_parse_pplib_clock_info()  local
2200 		mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow);  in rv7xx_parse_pplib_clock_info()
2201 		mclk |= clock_info->evergreen.ucMemoryClockHigh << 16;  in rv7xx_parse_pplib_clock_info()
2209 		mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow);  in rv7xx_parse_pplib_clock_info()
2210 		mclk |= clock_info->r600.ucMemoryClockHigh << 16;  in rv7xx_parse_pplib_clock_info()
2216 	pl->mclk = mclk;  in rv7xx_parse_pplib_clock_info()
2252 		pl->mclk = rdev->clock.default_mclk;  in rv7xx_parse_pplib_clock_info()
2261 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;  in rv7xx_parse_pplib_clock_info()
2444 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in rv770_dpm_print_power_state()
2447 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in rv770_dpm_print_power_state()
2450 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in rv770_dpm_print_power_state()
2454 		       pl->sclk, pl->mclk, pl->vddc);  in rv770_dpm_print_power_state()
2457 		       pl->sclk, pl->mclk, pl->vddc);  in rv770_dpm_print_power_state()
2460 		       pl->sclk, pl->mclk, pl->vddc);  in rv770_dpm_print_power_state()
2487 				   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in rv770_dpm_debugfs_print_current_performance_level()
2490 				   current_index, pl->sclk, pl->mclk, pl->vddc);  in rv770_dpm_debugfs_print_current_performance_level()
2535 		return  pl->mclk;  in rv770_dpm_get_current_mclk()
2565 		return requested_state->low.mclk;  in rv770_dpm_get_mclk()
2567 		return requested_state->high.mclk;  in rv770_dpm_get_mclk()