Lines Matching refs:pi
44 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_sclk_value() local
46 u32 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_sclk_value()
47 u32 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2; in rv730_populate_sclk_value()
48 u32 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3; in rv730_populate_sclk_value()
49 u32 cg_spll_spread_spectrum = pi->clk_regs.rv730.cg_spll_spread_spectrum; in rv730_populate_sclk_value()
50 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv730.cg_spll_spread_spectrum_2; in rv730_populate_sclk_value()
91 if (pi->sclk_ss) { in rv730_populate_sclk_value()
123 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_mclk_value() local
124 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv730.mclk_pwrmgt_cntl; in rv730_populate_mclk_value()
125 u32 dll_cntl = pi->clk_regs.rv730.dll_cntl; in rv730_populate_mclk_value()
126 u32 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_mclk_value()
127 u32 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2; in rv730_populate_mclk_value()
128 u32 mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3; in rv730_populate_mclk_value()
129 u32 mpll_ss = pi->clk_regs.rv730.mpll_ss; in rv730_populate_mclk_value()
130 u32 mpll_ss2 = pi->clk_regs.rv730.mpll_ss2; in rv730_populate_mclk_value()
166 if (pi->mclk_ss) { in rv730_populate_mclk_value()
200 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_read_clock_registers() local
202 pi->clk_regs.rv730.cg_spll_func_cntl = in rv730_read_clock_registers()
204 pi->clk_regs.rv730.cg_spll_func_cntl_2 = in rv730_read_clock_registers()
206 pi->clk_regs.rv730.cg_spll_func_cntl_3 = in rv730_read_clock_registers()
208 pi->clk_regs.rv730.cg_spll_spread_spectrum = in rv730_read_clock_registers()
210 pi->clk_regs.rv730.cg_spll_spread_spectrum_2 = in rv730_read_clock_registers()
213 pi->clk_regs.rv730.mclk_pwrmgt_cntl = in rv730_read_clock_registers()
215 pi->clk_regs.rv730.dll_cntl = in rv730_read_clock_registers()
217 pi->clk_regs.rv730.mpll_func_cntl = in rv730_read_clock_registers()
219 pi->clk_regs.rv730.mpll_func_cntl2 = in rv730_read_clock_registers()
221 pi->clk_regs.rv730.mpll_func_cntl3 = in rv730_read_clock_registers()
223 pi->clk_regs.rv730.mpll_ss = in rv730_read_clock_registers()
225 pi->clk_regs.rv730.mpll_ss2 = in rv730_read_clock_registers()
232 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_smc_acpi_state() local
245 if (pi->acpi_vddc) { in rv730_populate_smc_acpi_state()
246 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv730_populate_smc_acpi_state()
248 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
249 pi->acpi_pcie_gen2 : 0; in rv730_populate_smc_acpi_state()
251 pi->acpi_pcie_gen2; in rv730_populate_smc_acpi_state()
253 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv730_populate_smc_acpi_state()
258 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_smc_acpi_state()
259 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2; in rv730_populate_smc_acpi_state()
260 mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3; in rv730_populate_smc_acpi_state()
287 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_smc_acpi_state()
288 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2; in rv730_populate_smc_acpi_state()
289 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3; in rv730_populate_smc_acpi_state()
324 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_smc_initial_state() local
328 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl); in rv730_populate_smc_initial_state()
330 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl2); in rv730_populate_smc_initial_state()
332 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl3); in rv730_populate_smc_initial_state()
334 cpu_to_be32(pi->clk_regs.rv730.mclk_pwrmgt_cntl); in rv730_populate_smc_initial_state()
336 cpu_to_be32(pi->clk_regs.rv730.dll_cntl); in rv730_populate_smc_initial_state()
338 cpu_to_be32(pi->clk_regs.rv730.mpll_ss); in rv730_populate_smc_initial_state()
340 cpu_to_be32(pi->clk_regs.rv730.mpll_ss2); in rv730_populate_smc_initial_state()
346 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl); in rv730_populate_smc_initial_state()
348 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_2); in rv730_populate_smc_initial_state()
350 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_3); in rv730_populate_smc_initial_state()
352 cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum); in rv730_populate_smc_initial_state()
354 cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum_2); in rv730_populate_smc_initial_state()
374 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv730_populate_smc_initial_state()
376 if (pi->boot_in_gen2) in rv730_populate_smc_initial_state()
478 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_program_dcodt() local
484 mc4_io_pad_cntl |= pi->odt_value_0[i]; in rv730_program_dcodt()
490 mc4_io_pad_cntl |= pi->odt_value_1[i]; in rv730_program_dcodt()
497 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_get_odt_values() local
500 pi->odt_value_0[0] = (u8)0; in rv730_get_odt_values()
501 pi->odt_value_1[0] = (u8)0x80; in rv730_get_odt_values()
504 pi->odt_value_0[1] = (u8)(mc4_io_pad_cntl & 0xff); in rv730_get_odt_values()
507 pi->odt_value_1[1] = (u8)(mc4_io_pad_cntl & 0xff); in rv730_get_odt_values()