Lines Matching refs:high
241 u32 low, u32 high, in rv6xx_generate_steps() argument
250 rv6xx_convert_clock_to_stepping(rdev, high, &target); in rv6xx_generate_steps()
444 state->high.sclk; in rv6xx_calculate_engine_speed_stepping_parameters()
457 state->high.mclk; in rv6xx_calculate_memory_clock_stepping_parameters()
459 state->high.mclk; in rv6xx_calculate_memory_clock_stepping_parameters()
467 if (state->high.mclk == state->medium.mclk) in rv6xx_calculate_memory_clock_stepping_parameters()
486 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
487 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
492 (state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false; in rv6xx_calculate_voltage_stepping_parameters()
494 (state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false; in rv6xx_calculate_voltage_stepping_parameters()
501 (state->high.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false; in rv6xx_calculate_voltage_stepping_parameters()
509 if ((state->high.vddc == state->medium.vddc) && in rv6xx_calculate_voltage_stepping_parameters()
510 ((state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) == in rv6xx_calculate_voltage_stepping_parameters()
1037 state->high.sclk, in rv6xx_calculate_ap()
1467 new_state->high.sclk, in rv6xx_generate_stepping_table()
1523 if (new_state->high.sclk >= current_state->high.sclk) in rv6xx_set_uvd_clock_before_set_eng_clock()
1540 if (new_state->high.sclk < current_state->high.sclk) in rv6xx_set_uvd_clock_after_set_eng_clock()
1835 pl = &ps->high; in rv6xx_parse_pplib_clock_info()
2022 pl = &ps->high; in rv6xx_dpm_print_power_state()
2046 pl = &ps->high; in rv6xx_dpm_debugfs_print_current_performance_level()
2071 pl = &ps->high; in rv6xx_dpm_get_current_sclk()
2094 pl = &ps->high; in rv6xx_dpm_get_current_mclk()
2117 return requested_state->high.sclk; in rv6xx_dpm_get_sclk()
2127 return requested_state->high.mclk; in rv6xx_dpm_get_mclk()