Lines Matching refs:new_state
430 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_engine_clock_scaling() local
434 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_scaling()
435 (new_state->sclk_low == old_state->sclk_low)) in rs780_set_engine_clock_scaling()
439 new_state->sclk_low, false, &min_dividers); in rs780_set_engine_clock_scaling()
444 new_state->sclk_high, false, &max_dividers); in rs780_set_engine_clock_scaling()
477 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_engine_clock_spc() local
481 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_spc()
482 (new_state->sclk_low == old_state->sclk_low)) in rs780_set_engine_clock_spc()
496 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_activate_engine_clk_scaling() local
499 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_activate_engine_clk_scaling()
500 (new_state->sclk_low == old_state->sclk_low)) in rs780_activate_engine_clk_scaling()
503 if (new_state->sclk_high == new_state->sclk_low) in rs780_activate_engine_clk_scaling()
525 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_enable_voltage_scaling() local
531 if ((new_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && in rs780_enable_voltage_scaling()
532 (new_state->min_voltage == RS780_VDDC_LEVEL_HIGH)) in rs780_enable_voltage_scaling()
536 new_state->max_voltage); in rs780_enable_voltage_scaling()
538 new_state->min_voltage); in rs780_enable_voltage_scaling()
567 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_uvd_clock_before_set_eng_clock() local
574 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()
584 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_uvd_clock_after_set_eng_clock() local
591 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()