47 static void rs600_gpu_init(struct radeon_device *rdev);
48 int rs600_mc_wait_for_idle(struct radeon_device *rdev);
56 static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc)  in avivo_is_in_vblank()  argument
64 static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc)  in avivo_is_counter_moving()  argument
85 void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)  in avivo_wait_for_vblank()  argument
89 	if (crtc >= rdev->num_crtc)  in avivo_wait_for_vblank()
98 	while (avivo_is_in_vblank(rdev, crtc)) {  in avivo_wait_for_vblank()
100 			if (!avivo_is_counter_moving(rdev, crtc))  in avivo_wait_for_vblank()
105 	while (!avivo_is_in_vblank(rdev, crtc)) {  in avivo_wait_for_vblank()
107 			if (!avivo_is_counter_moving(rdev, crtc))  in avivo_wait_for_vblank()
113 void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)  in rs600_page_flip()  argument
115 	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];  in rs600_page_flip()
130 	for (i = 0; i < rdev->usec_timeout; i++) {  in rs600_page_flip()
142 bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc_id)  in rs600_page_flip_pending()  argument
144 	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];  in rs600_page_flip_pending()
154 	struct radeon_device *rdev = dev->dev_private;  in avivo_program_fmt()  local
215 void rs600_pm_misc(struct radeon_device *rdev)  in rs600_pm_misc()  argument
217 	int requested_index = rdev->pm.requested_power_state_index;  in rs600_pm_misc()
218 	struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];  in rs600_pm_misc()
244 		radeon_atom_set_voltage(rdev, voltage->vddc_id, SET_VOLTAGE_TYPE_ASIC_VDDC);  in rs600_pm_misc()
298 	if ((rdev->flags & RADEON_IS_PCIE) &&  in rs600_pm_misc()
299 	    !(rdev->flags & RADEON_IS_IGP) &&  in rs600_pm_misc()
300 	    rdev->asic->pm.set_pcie_lanes &&  in rs600_pm_misc()
302 	     rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {  in rs600_pm_misc()
303 		radeon_set_pcie_lanes(rdev,  in rs600_pm_misc()
309 void rs600_pm_prepare(struct radeon_device *rdev)  in rs600_pm_prepare()  argument
311 	struct drm_device *ddev = rdev->ddev;  in rs600_pm_prepare()
327 void rs600_pm_finish(struct radeon_device *rdev)  in rs600_pm_finish()  argument
329 	struct drm_device *ddev = rdev->ddev;  in rs600_pm_finish()
346 bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)  in rs600_hpd_sense()  argument
368 void rs600_hpd_set_polarity(struct radeon_device *rdev,  in rs600_hpd_set_polarity()  argument
372 	bool connected = rs600_hpd_sense(rdev, hpd);  in rs600_hpd_set_polarity()
396 void rs600_hpd_init(struct radeon_device *rdev)  in rs600_hpd_init()  argument
398 	struct drm_device *dev = rdev->ddev;  in rs600_hpd_init()
417 		radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);  in rs600_hpd_init()
419 	radeon_irq_kms_enable_hpd(rdev, enable);  in rs600_hpd_init()
422 void rs600_hpd_fini(struct radeon_device *rdev)  in rs600_hpd_fini()  argument
424 	struct drm_device *dev = rdev->ddev;  in rs600_hpd_fini()
444 	radeon_irq_kms_disable_hpd(rdev, disable);  in rs600_hpd_fini()
447 int rs600_asic_reset(struct radeon_device *rdev)  in rs600_asic_reset()  argument
458 	rv515_mc_stop(rdev, &save);  in rs600_asic_reset()
460 	dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);  in rs600_asic_reset()
468 	pci_save_state(rdev->pdev);  in rs600_asic_reset()
470 	pci_clear_master(rdev->pdev);  in rs600_asic_reset()
480 	dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);  in rs600_asic_reset()
488 	dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);  in rs600_asic_reset()
496 	dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);  in rs600_asic_reset()
498 	pci_restore_state(rdev->pdev);  in rs600_asic_reset()
501 		dev_err(rdev->dev, "failed to reset GPU\n");  in rs600_asic_reset()
504 		dev_info(rdev->dev, "GPU reset succeed\n");  in rs600_asic_reset()
505 	rv515_mc_resume(rdev, &save);  in rs600_asic_reset()
512 void rs600_gart_tlb_flush(struct radeon_device *rdev)  in rs600_gart_tlb_flush()  argument
530 static int rs600_gart_init(struct radeon_device *rdev)  in rs600_gart_init()  argument
534 	if (rdev->gart.robj) {  in rs600_gart_init()
539 	r = radeon_gart_init(rdev);  in rs600_gart_init()
543 	rdev->gart.table_size = rdev->gart.num_gpu_pages * 8;  in rs600_gart_init()
544 	return radeon_gart_table_vram_alloc(rdev);  in rs600_gart_init()
547 static int rs600_gart_enable(struct radeon_device *rdev)  in rs600_gart_enable()  argument
552 	if (rdev->gart.robj == NULL) {  in rs600_gart_enable()
553 		dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");  in rs600_gart_enable()
556 	r = radeon_gart_table_vram_pin(rdev);  in rs600_gart_enable()
589 		  rdev->gart.table_addr);  in rs600_gart_enable()
590 	WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);  in rs600_gart_enable()
591 	WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);  in rs600_gart_enable()
595 	WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);  in rs600_gart_enable()
596 	WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);  in rs600_gart_enable()
603 	rs600_gart_tlb_flush(rdev);  in rs600_gart_enable()
605 		 (unsigned)(rdev->mc.gtt_size >> 20),  in rs600_gart_enable()
606 		 (unsigned long long)rdev->gart.table_addr);  in rs600_gart_enable()
607 	rdev->gart.ready = true;  in rs600_gart_enable()
611 static void rs600_gart_disable(struct radeon_device *rdev)  in rs600_gart_disable()  argument
619 	radeon_gart_table_vram_unpin(rdev);  in rs600_gart_disable()
622 static void rs600_gart_fini(struct radeon_device *rdev)  in rs600_gart_fini()  argument
624 	radeon_gart_fini(rdev);  in rs600_gart_fini()
625 	rs600_gart_disable(rdev);  in rs600_gart_fini()
626 	radeon_gart_table_vram_free(rdev);  in rs600_gart_fini()
644 void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,  in rs600_gart_set_page()  argument
647 	void __iomem *ptr = (void *)rdev->gart.ptr;  in rs600_gart_set_page()
651 int rs600_irq_set(struct radeon_device *rdev)  in rs600_irq_set()  argument
660 	if (ASIC_IS_DCE2(rdev))  in rs600_irq_set()
666 	if (!rdev->irq.installed) {  in rs600_irq_set()
671 	if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) {  in rs600_irq_set()
674 	if (rdev->irq.crtc_vblank_int[0] ||  in rs600_irq_set()
675 	    atomic_read(&rdev->irq.pflip[0])) {  in rs600_irq_set()
678 	if (rdev->irq.crtc_vblank_int[1] ||  in rs600_irq_set()
679 	    atomic_read(&rdev->irq.pflip[1])) {  in rs600_irq_set()
682 	if (rdev->irq.hpd[0]) {  in rs600_irq_set()
685 	if (rdev->irq.hpd[1]) {  in rs600_irq_set()
688 	if (rdev->irq.afmt[0]) {  in rs600_irq_set()
695 	if (ASIC_IS_DCE2(rdev))  in rs600_irq_set()
704 static inline u32 rs600_irq_ack(struct radeon_device *rdev)  in rs600_irq_ack()  argument
711 		rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS);  in rs600_irq_ack()
712 		if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_ack()
716 		if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_ack()
720 		if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_ack()
725 		if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_ack()
731 		rdev->irq.stat_regs.r500.disp_int = 0;  in rs600_irq_ack()
734 	if (ASIC_IS_DCE2(rdev)) {  in rs600_irq_ack()
735 		rdev->irq.stat_regs.r500.hdmi0_status = RREG32(R_007404_HDMI0_STATUS) &  in rs600_irq_ack()
737 		if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) {  in rs600_irq_ack()
743 		rdev->irq.stat_regs.r500.hdmi0_status = 0;  in rs600_irq_ack()
751 void rs600_irq_disable(struct radeon_device *rdev)  in rs600_irq_disable()  argument
760 	rs600_irq_ack(rdev);  in rs600_irq_disable()
763 int rs600_irq_process(struct radeon_device *rdev)  in rs600_irq_process()  argument
769 	status = rs600_irq_ack(rdev);  in rs600_irq_process()
771 	    !rdev->irq.stat_regs.r500.disp_int &&  in rs600_irq_process()
772 	    !rdev->irq.stat_regs.r500.hdmi0_status) {  in rs600_irq_process()
776 	       rdev->irq.stat_regs.r500.disp_int ||  in rs600_irq_process()
777 	       rdev->irq.stat_regs.r500.hdmi0_status) {  in rs600_irq_process()
780 			radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);  in rs600_irq_process()
783 		if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_process()
784 			if (rdev->irq.crtc_vblank_int[0]) {  in rs600_irq_process()
785 				drm_handle_vblank(rdev->ddev, 0);  in rs600_irq_process()
786 				rdev->pm.vblank_sync = true;  in rs600_irq_process()
787 				wake_up(&rdev->irq.vblank_queue);  in rs600_irq_process()
789 			if (atomic_read(&rdev->irq.pflip[0]))  in rs600_irq_process()
790 				radeon_crtc_handle_vblank(rdev, 0);  in rs600_irq_process()
792 		if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_process()
793 			if (rdev->irq.crtc_vblank_int[1]) {  in rs600_irq_process()
794 				drm_handle_vblank(rdev->ddev, 1);  in rs600_irq_process()
795 				rdev->pm.vblank_sync = true;  in rs600_irq_process()
796 				wake_up(&rdev->irq.vblank_queue);  in rs600_irq_process()
798 			if (atomic_read(&rdev->irq.pflip[1]))  in rs600_irq_process()
799 				radeon_crtc_handle_vblank(rdev, 1);  in rs600_irq_process()
801 		if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_process()
805 		if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {  in rs600_irq_process()
809 		if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) {  in rs600_irq_process()
813 		status = rs600_irq_ack(rdev);  in rs600_irq_process()
816 		schedule_delayed_work(&rdev->hotplug_work, 0);  in rs600_irq_process()
818 		schedule_work(&rdev->audio_work);  in rs600_irq_process()
819 	if (rdev->msi_enabled) {  in rs600_irq_process()
820 		switch (rdev->family) {  in rs600_irq_process()
836 u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc)  in rs600_get_vblank_counter()  argument
844 int rs600_mc_wait_for_idle(struct radeon_device *rdev)  in rs600_mc_wait_for_idle()  argument
848 	for (i = 0; i < rdev->usec_timeout; i++) {  in rs600_mc_wait_for_idle()
856 static void rs600_gpu_init(struct radeon_device *rdev)  in rs600_gpu_init()  argument
858 	r420_pipes_init(rdev);  in rs600_gpu_init()
860 	if (rs600_mc_wait_for_idle(rdev))  in rs600_gpu_init()
861 		dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");  in rs600_gpu_init()
864 static void rs600_mc_init(struct radeon_device *rdev)  in rs600_mc_init()  argument
868 	rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);  in rs600_mc_init()
869 	rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);  in rs600_mc_init()
870 	rdev->mc.vram_is_ddr = true;  in rs600_mc_init()
871 	rdev->mc.vram_width = 128;  in rs600_mc_init()
872 	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);  in rs600_mc_init()
873 	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;  in rs600_mc_init()
874 	rdev->mc.visible_vram_size = rdev->mc.aper_size;  in rs600_mc_init()
875 	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);  in rs600_mc_init()
878 	radeon_vram_location(rdev, &rdev->mc, base);  in rs600_mc_init()
879 	rdev->mc.gtt_base_align = 0;  in rs600_mc_init()
880 	radeon_gtt_location(rdev, &rdev->mc);  in rs600_mc_init()
881 	radeon_update_bandwidth_info(rdev);  in rs600_mc_init()
884 void rs600_bandwidth_update(struct radeon_device *rdev)  in rs600_bandwidth_update()  argument
891 	if (!rdev->mode_info.mode_config_initialized)  in rs600_bandwidth_update()
894 	radeon_update_display_priority(rdev);  in rs600_bandwidth_update()
896 	if (rdev->mode_info.crtcs[0]->base.enabled)  in rs600_bandwidth_update()
897 		mode0 = &rdev->mode_info.crtcs[0]->base.mode;  in rs600_bandwidth_update()
898 	if (rdev->mode_info.crtcs[1]->base.enabled)  in rs600_bandwidth_update()
899 		mode1 = &rdev->mode_info.crtcs[1]->base.mode;  in rs600_bandwidth_update()
901 	rs690_line_buffer_adjust(rdev, mode0, mode1);  in rs600_bandwidth_update()
903 	if (rdev->disp_priority == 2) {  in rs600_bandwidth_update()
915 uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg)  in rs600_mc_rreg()  argument
920 	spin_lock_irqsave(&rdev->mc_idx_lock, flags);  in rs600_mc_rreg()
924 	spin_unlock_irqrestore(&rdev->mc_idx_lock, flags);  in rs600_mc_rreg()
928 void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)  in rs600_mc_wreg()  argument
932 	spin_lock_irqsave(&rdev->mc_idx_lock, flags);  in rs600_mc_wreg()
936 	spin_unlock_irqrestore(&rdev->mc_idx_lock, flags);  in rs600_mc_wreg()
939 static void rs600_debugfs(struct radeon_device *rdev)  in rs600_debugfs()  argument
941 	if (r100_debugfs_rbbm_init(rdev))  in rs600_debugfs()
945 void rs600_set_safe_registers(struct radeon_device *rdev)  in rs600_set_safe_registers()  argument
947 	rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm;  in rs600_set_safe_registers()
948 	rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm);  in rs600_set_safe_registers()
951 static void rs600_mc_program(struct radeon_device *rdev)  in rs600_mc_program()  argument
956 	rv515_mc_stop(rdev, &save);  in rs600_mc_program()
959 	if (rs600_mc_wait_for_idle(rdev))  in rs600_mc_program()
960 		dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");  in rs600_mc_program()
968 			S_000004_MC_FB_START(rdev->mc.vram_start >> 16) |  in rs600_mc_program()
969 			S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16));  in rs600_mc_program()
971 		S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));  in rs600_mc_program()
973 	rv515_mc_resume(rdev, &save);  in rs600_mc_program()
976 static int rs600_startup(struct radeon_device *rdev)  in rs600_startup()  argument
980 	rs600_mc_program(rdev);  in rs600_startup()
982 	rv515_clock_startup(rdev);  in rs600_startup()
984 	rs600_gpu_init(rdev);  in rs600_startup()
987 	r = rs600_gart_enable(rdev);  in rs600_startup()
992 	r = radeon_wb_init(rdev);  in rs600_startup()
996 	r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX);  in rs600_startup()
998 		dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);  in rs600_startup()
1003 	if (!rdev->irq.installed) {  in rs600_startup()
1004 		r = radeon_irq_kms_init(rdev);  in rs600_startup()
1009 	rs600_irq_set(rdev);  in rs600_startup()
1010 	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);  in rs600_startup()
1012 	r = r100_cp_init(rdev, 1024 * 1024);  in rs600_startup()
1014 		dev_err(rdev->dev, "failed initializing CP (%d).\n", r);  in rs600_startup()
1018 	r = radeon_ib_pool_init(rdev);  in rs600_startup()
1020 		dev_err(rdev->dev, "IB initialization failed (%d).\n", r);  in rs600_startup()
1024 	r = radeon_audio_init(rdev);  in rs600_startup()
1026 		dev_err(rdev->dev, "failed initializing audio\n");  in rs600_startup()
1033 int rs600_resume(struct radeon_device *rdev)  in rs600_resume()  argument
1038 	rs600_gart_disable(rdev);  in rs600_resume()
1040 	rv515_clock_startup(rdev);  in rs600_resume()
1042 	if (radeon_asic_reset(rdev)) {  in rs600_resume()
1043 		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",  in rs600_resume()
1048 	atom_asic_init(rdev->mode_info.atom_context);  in rs600_resume()
1050 	rv515_clock_startup(rdev);  in rs600_resume()
1052 	radeon_surface_init(rdev);  in rs600_resume()
1054 	rdev->accel_working = true;  in rs600_resume()
1055 	r = rs600_startup(rdev);  in rs600_resume()
1057 		rdev->accel_working = false;  in rs600_resume()
1062 int rs600_suspend(struct radeon_device *rdev)  in rs600_suspend()  argument
1064 	radeon_pm_suspend(rdev);  in rs600_suspend()
1065 	radeon_audio_fini(rdev);  in rs600_suspend()
1066 	r100_cp_disable(rdev);  in rs600_suspend()
1067 	radeon_wb_disable(rdev);  in rs600_suspend()
1068 	rs600_irq_disable(rdev);  in rs600_suspend()
1069 	rs600_gart_disable(rdev);  in rs600_suspend()
1073 void rs600_fini(struct radeon_device *rdev)  in rs600_fini()  argument
1075 	radeon_pm_fini(rdev);  in rs600_fini()
1076 	radeon_audio_fini(rdev);  in rs600_fini()
1077 	r100_cp_fini(rdev);  in rs600_fini()
1078 	radeon_wb_fini(rdev);  in rs600_fini()
1079 	radeon_ib_pool_fini(rdev);  in rs600_fini()
1080 	radeon_gem_fini(rdev);  in rs600_fini()
1081 	rs600_gart_fini(rdev);  in rs600_fini()
1082 	radeon_irq_kms_fini(rdev);  in rs600_fini()
1083 	radeon_fence_driver_fini(rdev);  in rs600_fini()
1084 	radeon_bo_fini(rdev);  in rs600_fini()
1085 	radeon_atombios_fini(rdev);  in rs600_fini()
1086 	kfree(rdev->bios);  in rs600_fini()
1087 	rdev->bios = NULL;  in rs600_fini()
1090 int rs600_init(struct radeon_device *rdev)  in rs600_init()  argument
1095 	rv515_vga_render_disable(rdev);  in rs600_init()
1097 	radeon_scratch_init(rdev);  in rs600_init()
1099 	radeon_surface_init(rdev);  in rs600_init()
1101 	r100_restore_sanity(rdev);  in rs600_init()
1103 	if (!radeon_get_bios(rdev)) {  in rs600_init()
1104 		if (ASIC_IS_AVIVO(rdev))  in rs600_init()
1107 	if (rdev->is_atom_bios) {  in rs600_init()
1108 		r = radeon_atombios_init(rdev);  in rs600_init()
1112 		dev_err(rdev->dev, "Expecting atombios for RS600 GPU\n");  in rs600_init()
1116 	if (radeon_asic_reset(rdev)) {  in rs600_init()
1117 		dev_warn(rdev->dev,  in rs600_init()
1123 	if (radeon_boot_test_post_card(rdev) == false)  in rs600_init()
1127 	radeon_get_clock_info(rdev->ddev);  in rs600_init()
1129 	rs600_mc_init(rdev);  in rs600_init()
1130 	rs600_debugfs(rdev);  in rs600_init()
1132 	r = radeon_fence_driver_init(rdev);  in rs600_init()
1136 	r = radeon_bo_init(rdev);  in rs600_init()
1139 	r = rs600_gart_init(rdev);  in rs600_init()
1142 	rs600_set_safe_registers(rdev);  in rs600_init()
1145 	radeon_pm_init(rdev);  in rs600_init()
1147 	rdev->accel_working = true;  in rs600_init()
1148 	r = rs600_startup(rdev);  in rs600_init()
1151 		dev_err(rdev->dev, "Disabling GPU acceleration\n");  in rs600_init()
1152 		r100_cp_fini(rdev);  in rs600_init()
1153 		radeon_wb_fini(rdev);  in rs600_init()
1154 		radeon_ib_pool_fini(rdev);  in rs600_init()
1155 		rs600_gart_fini(rdev);  in rs600_init()
1156 		radeon_irq_kms_fini(rdev);  in rs600_init()
1157 		rdev->accel_working = false;  in rs600_init()