Lines Matching refs:mc
143 man->gpu_offset = rdev->mc.gtt_start; in radeon_init_mem_type()
165 man->gpu_offset = rdev->mc.vram_start; in radeon_init_mem_type()
201 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && in radeon_evict_flags()
202 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { in radeon_evict_flags()
203 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; in radeon_evict_flags()
271 old_start += rdev->mc.vram_start; in radeon_move_blit()
274 old_start += rdev->mc.gtt_start; in radeon_move_blit()
282 new_start += rdev->mc.vram_start; in radeon_move_blit()
285 new_start += rdev->mc.gtt_start; in radeon_move_blit()
470 mem->bus.base = rdev->mc.agp_base; in radeon_ttm_io_mem_reserve()
478 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size) in radeon_ttm_io_mem_reserve()
480 mem->bus.base = rdev->mc.aper_base; in radeon_ttm_io_mem_reserve()
886 rdev->mc.real_vram_size >> PAGE_SHIFT); in radeon_ttm_init()
892 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); in radeon_ttm_init()
910 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); in radeon_ttm_init()
912 rdev->mc.gtt_size >> PAGE_SHIFT); in radeon_ttm_init()
918 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); in radeon_ttm_init()
1047 i_size_write(inode, rdev->mc.mc_vram_size); in radeon_ttm_vram_open()
1066 if (*pos >= rdev->mc.mc_vram_size) in radeon_ttm_vram_read()
1099 i_size_write(inode, rdev->mc.gtt_size); in radeon_ttm_gtt_open()