877 				     drm_radeon_clear_rect_t * depth_boxes)  in radeon_cp_dispatch_clear()  argument
1263 			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);  in radeon_cp_dispatch_clear()
1264 			OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);  in radeon_cp_dispatch_clear()
1265 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
1267 			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);  in radeon_cp_dispatch_clear()
1268 			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);  in radeon_cp_dispatch_clear()
1269 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
1271 			OUT_RING(depth_boxes[i].ui[CLEAR_X2]);  in radeon_cp_dispatch_clear()
1272 			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);  in radeon_cp_dispatch_clear()
1273 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
1340 			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);  in radeon_cp_dispatch_clear()
1341 			OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);  in radeon_cp_dispatch_clear()
1342 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
1345 			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);  in radeon_cp_dispatch_clear()
1346 			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);  in radeon_cp_dispatch_clear()
1347 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
1350 			OUT_RING(depth_boxes[i].ui[CLEAR_X2]);  in radeon_cp_dispatch_clear()
1351 			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);  in radeon_cp_dispatch_clear()
1352 			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);  in radeon_cp_dispatch_clear()
2161 	drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];  in radeon_cp_clear()  local
2171 	if (copy_from_user(&depth_boxes, clear->depth_boxes,  in radeon_cp_clear()
2172 			       sarea_priv->nbox * sizeof(depth_boxes[0])))  in radeon_cp_clear()
2175 	radeon_cp_dispatch_clear(dev, file_priv->master, clear, depth_boxes);  in radeon_cp_clear()