774 	x += master_priv->sarea_priv->boxes[0].x1;  in radeon_clear_box()
775 	y += master_priv->sarea_priv->boxes[0].y1;  in radeon_clear_box()
824 		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;  in radeon_cp_performance_boxes()
828 		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;  in radeon_cp_performance_boxes()
833 	if (dev_priv->stats.boxes & RADEON_BOX_FLIP)  in radeon_cp_performance_boxes()
838 	if (dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE)  in radeon_cp_performance_boxes()
846 	if (dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD)  in radeon_cp_performance_boxes()
851 	if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE))  in radeon_cp_performance_boxes()
884 	struct drm_clip_rect *pbox = sarea_priv->boxes;  in radeon_cp_dispatch_clear()
1256 			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);  in radeon_cp_dispatch_clear()
1327 			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);  in radeon_cp_dispatch_clear()
1379 	struct drm_clip_rect *pbox = sarea_priv->boxes;  in radeon_cp_dispatch_swap()
1465 		dev_priv->stats.boxes |= RADEON_BOX_FLIP;  in radeon_cp_dispatch_flip()
1557 			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);  in radeon_cp_dispatch_vertex()
1684 			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);  in radeon_cp_dispatch_indices()
1718 	dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD;  in radeon_cp_dispatch_texture()
2785 	struct drm_clip_rect __user *boxes = cmdbuf->boxes;  in radeon_emit_packet3_cliprect()  local
2802 			if (copy_from_user(&box, &boxes[i], sizeof(box)))  in radeon_emit_packet3_cliprect()