Lines Matching refs:rdev
45 static int radeon_debugfs_pm_init(struct radeon_device *rdev);
46 static bool radeon_pm_in_vbl(struct radeon_device *rdev);
47 static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
48 static void radeon_pm_update_profile(struct radeon_device *rdev);
49 static void radeon_pm_set_clocks(struct radeon_device *rdev);
51 int radeon_pm_get_type_index(struct radeon_device *rdev, in radeon_pm_get_type_index() argument
58 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
59 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
66 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
69 void radeon_pm_acpi_event_handler(struct radeon_device *rdev) in radeon_pm_acpi_event_handler() argument
71 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
72 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
74 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
76 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
77 if (rdev->family == CHIP_ARUBA) { in radeon_pm_acpi_event_handler()
78 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
79 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
81 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
82 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
83 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
84 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
85 radeon_pm_update_profile(rdev); in radeon_pm_acpi_event_handler()
86 radeon_pm_set_clocks(rdev); in radeon_pm_acpi_event_handler()
87 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
92 static void radeon_pm_update_profile(struct radeon_device *rdev) in radeon_pm_update_profile() argument
94 switch (rdev->pm.profile) { in radeon_pm_update_profile()
96 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
100 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
101 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
103 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
105 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
106 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
108 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
112 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
113 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
115 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
118 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
119 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
121 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
124 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
125 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
127 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
131 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
132 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
133 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
134 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
135 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
137 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
138 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
139 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
140 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
144 static void radeon_unmap_vram_bos(struct radeon_device *rdev) in radeon_unmap_vram_bos() argument
148 if (list_empty(&rdev->gem.objects)) in radeon_unmap_vram_bos()
151 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { in radeon_unmap_vram_bos()
157 static void radeon_sync_with_vblank(struct radeon_device *rdev) in radeon_sync_with_vblank() argument
159 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
160 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
162 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
167 static void radeon_set_power_state(struct radeon_device *rdev) in radeon_set_power_state() argument
172 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
173 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
176 if (radeon_gui_idle(rdev)) { in radeon_set_power_state()
177 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
178 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
179 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
180 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
186 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
187 (rdev->family >= CHIP_BARTS) && in radeon_set_power_state()
188 rdev->pm.active_crtc_count && in radeon_set_power_state()
189 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
190 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
191 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
194 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
195 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
197 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
198 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
201 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
204 radeon_sync_with_vblank(rdev); in radeon_set_power_state()
206 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
207 if (!radeon_pm_in_vbl(rdev)) in radeon_set_power_state()
211 radeon_pm_prepare(rdev); in radeon_set_power_state()
215 radeon_pm_misc(rdev); in radeon_set_power_state()
218 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
219 radeon_pm_debug_check_in_vbl(rdev, false); in radeon_set_power_state()
220 radeon_set_engine_clock(rdev, sclk); in radeon_set_power_state()
221 radeon_pm_debug_check_in_vbl(rdev, true); in radeon_set_power_state()
222 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
227 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
228 radeon_pm_debug_check_in_vbl(rdev, false); in radeon_set_power_state()
229 radeon_set_memory_clock(rdev, mclk); in radeon_set_power_state()
230 radeon_pm_debug_check_in_vbl(rdev, true); in radeon_set_power_state()
231 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
237 radeon_pm_misc(rdev); in radeon_set_power_state()
239 radeon_pm_finish(rdev); in radeon_set_power_state()
241 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
242 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
247 static void radeon_pm_set_clocks(struct radeon_device *rdev) in radeon_pm_set_clocks() argument
252 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
253 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
256 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
257 mutex_lock(&rdev->ring_lock); in radeon_pm_set_clocks()
261 struct radeon_ring *ring = &rdev->ring[i]; in radeon_pm_set_clocks()
265 r = radeon_fence_wait_empty(rdev, i); in radeon_pm_set_clocks()
268 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
269 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
274 radeon_unmap_vram_bos(rdev); in radeon_pm_set_clocks()
276 if (rdev->irq.installed) { in radeon_pm_set_clocks()
277 for (i = 0; i < rdev->num_crtc; i++) { in radeon_pm_set_clocks()
278 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
279 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
280 drm_vblank_get(rdev->ddev, i); in radeon_pm_set_clocks()
285 radeon_set_power_state(rdev); in radeon_pm_set_clocks()
287 if (rdev->irq.installed) { in radeon_pm_set_clocks()
288 for (i = 0; i < rdev->num_crtc; i++) { in radeon_pm_set_clocks()
289 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
290 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
291 drm_vblank_put(rdev->ddev, i); in radeon_pm_set_clocks()
297 radeon_update_bandwidth_info(rdev); in radeon_pm_set_clocks()
298 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
299 radeon_bandwidth_update(rdev); in radeon_pm_set_clocks()
301 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
303 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
304 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
307 static void radeon_pm_print_states(struct radeon_device *rdev) in radeon_pm_print_states() argument
313 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
314 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
315 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
318 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
320 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) in radeon_pm_print_states()
327 if (rdev->flags & RADEON_IS_IGP) in radeon_pm_print_states()
346 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_profile() local
347 int cp = rdev->pm.profile; in radeon_get_pm_profile()
362 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_profile() local
365 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_profile()
369 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
370 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
372 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
374 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
376 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
378 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
380 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
385 radeon_pm_update_profile(rdev); in radeon_set_pm_profile()
386 radeon_pm_set_clocks(rdev); in radeon_set_pm_profile()
391 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
401 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_method() local
402 int pm = rdev->pm.pm_method; in radeon_get_pm_method()
415 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_method() local
418 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_method()
425 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
431 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
432 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
433 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
434 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
435 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
437 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
439 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
440 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
441 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
442 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
443 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
448 radeon_pm_compute_clocks(rdev); in radeon_set_pm_method()
458 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_state() local
459 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
472 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_state() local
474 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
476 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
478 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
480 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
482 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
486 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
489 if (!(rdev->flags & RADEON_IS_PX) || in radeon_set_dpm_state()
491 radeon_pm_compute_clocks(rdev); in radeon_set_dpm_state()
502 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_forced_performance_level() local
503 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
505 if ((rdev->flags & RADEON_IS_PX) && in radeon_get_dpm_forced_performance_level()
520 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_forced_performance_level() local
525 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_dpm_forced_performance_level()
529 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
540 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
541 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
545 ret = radeon_dpm_force_performance_level(rdev, level); in radeon_set_dpm_forced_performance_level()
550 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
559 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_get_pwm1_enable() local
562 if (rdev->asic->dpm.fan_ctrl_get_mode) in radeon_hwmon_get_pwm1_enable()
563 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); in radeon_hwmon_get_pwm1_enable()
574 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_set_pwm1_enable() local
578 if(!rdev->asic->dpm.fan_ctrl_set_mode) in radeon_hwmon_set_pwm1_enable()
587 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); in radeon_hwmon_set_pwm1_enable()
590 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
615 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_set_pwm1() local
625 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); in radeon_hwmon_set_pwm1()
636 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_get_pwm1() local
640 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); in radeon_hwmon_get_pwm1()
660 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_show_temp() local
661 struct drm_device *ddev = rdev->ddev; in radeon_hwmon_show_temp()
665 if ((rdev->flags & RADEON_IS_PX) && in radeon_hwmon_show_temp()
669 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
670 temp = radeon_get_temperature(rdev); in radeon_hwmon_show_temp()
681 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_show_temp_thresh() local
686 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
688 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
717 struct radeon_device *rdev = dev_get_drvdata(dev); in hwmon_attributes_visible() local
721 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
731 if (rdev->pm.no_fan && in hwmon_attributes_visible()
739 if ((!rdev->asic->dpm.get_fan_speed_percent && in hwmon_attributes_visible()
741 (!rdev->asic->dpm.fan_ctrl_get_mode && in hwmon_attributes_visible()
745 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
747 (!rdev->asic->dpm.fan_ctrl_set_mode && in hwmon_attributes_visible()
752 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
753 !rdev->asic->dpm.get_fan_speed_percent) && in hwmon_attributes_visible()
771 static int radeon_hwmon_init(struct radeon_device *rdev) in radeon_hwmon_init() argument
775 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
784 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
786 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
787 "radeon", rdev, in radeon_hwmon_init()
789 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
790 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
791 dev_err(rdev->dev, in radeon_hwmon_init()
802 static void radeon_hwmon_fini(struct radeon_device *rdev) in radeon_hwmon_fini() argument
804 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
805 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
810 struct radeon_device *rdev = in radeon_dpm_thermal_work_handler() local
816 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
819 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
820 int temp = radeon_get_temperature(rdev); in radeon_dpm_thermal_work_handler()
822 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
824 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
826 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
828 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
830 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
832 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
834 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
835 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
836 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
838 radeon_pm_compute_clocks(rdev); in radeon_dpm_thermal_work_handler()
841 static bool radeon_dpm_single_display(struct radeon_device *rdev) in radeon_dpm_single_display() argument
843 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
847 if (single_display && rdev->asic->dpm.vblank_too_short) { in radeon_dpm_single_display()
848 if (radeon_dpm_vblank_too_short(rdev)) in radeon_dpm_single_display()
855 if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120)) in radeon_dpm_single_display()
861 static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev, in radeon_dpm_pick_power_state() argument
867 bool single_display = radeon_dpm_single_display(rdev); in radeon_dpm_pick_power_state()
880 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
881 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
914 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
915 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
935 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
964 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
965 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
988 static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) in radeon_dpm_change_power_state_locked() argument
994 bool single_display = radeon_dpm_single_display(rdev); in radeon_dpm_change_power_state_locked()
997 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1000 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1002 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1003 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1004 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1006 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1008 ps = radeon_dpm_pick_power_state(rdev, dpm_state); in radeon_dpm_change_power_state_locked()
1010 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1015 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1017 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1020 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1022 if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { in radeon_dpm_change_power_state_locked()
1026 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1028 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1030 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1031 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1032 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1040 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1041 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1044 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1045 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1047 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1049 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1050 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1051 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1061 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1063 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1066 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1067 mutex_lock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1070 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1072 ret = radeon_dpm_pre_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1077 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1079 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1083 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dpm_change_power_state_locked()
1085 radeon_fence_wait_empty(rdev, i); in radeon_dpm_change_power_state_locked()
1089 radeon_dpm_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1092 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1094 radeon_dpm_post_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1096 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1097 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1098 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1100 if (rdev->asic->dpm.force_performance_level) { in radeon_dpm_change_power_state_locked()
1101 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1102 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1104 radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); in radeon_dpm_change_power_state_locked()
1106 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1109 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1114 mutex_unlock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1115 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1118 void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) in radeon_dpm_enable_uvd() argument
1122 if (rdev->asic->dpm.powergate_uvd) { in radeon_dpm_enable_uvd()
1123 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1126 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1127 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1129 radeon_dpm_powergate_uvd(rdev, !enable); in radeon_dpm_enable_uvd()
1130 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1133 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1134 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1137 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1139 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1141 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1143 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1148 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1149 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1151 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1152 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1153 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1156 radeon_pm_compute_clocks(rdev); in radeon_dpm_enable_uvd()
1160 void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable) in radeon_dpm_enable_vce() argument
1163 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1164 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1166 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1167 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1169 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1170 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1171 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1174 radeon_pm_compute_clocks(rdev); in radeon_dpm_enable_vce()
1177 static void radeon_pm_suspend_old(struct radeon_device *rdev) in radeon_pm_suspend_old() argument
1179 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1180 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1181 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1182 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1184 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1186 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1189 static void radeon_pm_suspend_dpm(struct radeon_device *rdev) in radeon_pm_suspend_dpm() argument
1191 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1193 radeon_dpm_disable(rdev); in radeon_pm_suspend_dpm()
1195 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1196 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1197 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1200 void radeon_pm_suspend(struct radeon_device *rdev) in radeon_pm_suspend() argument
1202 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1203 radeon_pm_suspend_dpm(rdev); in radeon_pm_suspend()
1205 radeon_pm_suspend_old(rdev); in radeon_pm_suspend()
1208 static void radeon_pm_resume_old(struct radeon_device *rdev) in radeon_pm_resume_old() argument
1211 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_old()
1212 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_old()
1213 rdev->mc_fw) { in radeon_pm_resume_old()
1214 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1215 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1217 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1218 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1220 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1221 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1222 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1223 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1226 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1227 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1228 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1229 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1230 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1231 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1232 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1233 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1235 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1236 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1237 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1238 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1241 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1242 radeon_pm_compute_clocks(rdev); in radeon_pm_resume_old()
1245 static void radeon_pm_resume_dpm(struct radeon_device *rdev) in radeon_pm_resume_dpm() argument
1250 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1251 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1252 radeon_dpm_setup_asic(rdev); in radeon_pm_resume_dpm()
1253 ret = radeon_dpm_enable(rdev); in radeon_pm_resume_dpm()
1254 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1257 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1262 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_dpm()
1263 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_dpm()
1264 rdev->mc_fw) { in radeon_pm_resume_dpm()
1265 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1266 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1268 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1269 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1271 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1272 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1273 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1274 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1278 void radeon_pm_resume(struct radeon_device *rdev) in radeon_pm_resume() argument
1280 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1281 radeon_pm_resume_dpm(rdev); in radeon_pm_resume()
1283 radeon_pm_resume_old(rdev); in radeon_pm_resume()
1286 static int radeon_pm_init_old(struct radeon_device *rdev) in radeon_pm_init_old() argument
1290 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1291 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1292 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1293 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1294 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1295 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1296 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1297 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1298 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1299 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1301 if (rdev->bios) { in radeon_pm_init_old()
1302 if (rdev->is_atom_bios) in radeon_pm_init_old()
1303 radeon_atombios_get_power_modes(rdev); in radeon_pm_init_old()
1305 radeon_combios_get_power_modes(rdev); in radeon_pm_init_old()
1306 radeon_pm_print_states(rdev); in radeon_pm_init_old()
1307 radeon_pm_init_profile(rdev); in radeon_pm_init_old()
1309 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_old()
1310 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_old()
1311 rdev->mc_fw) { in radeon_pm_init_old()
1312 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1313 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1315 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1316 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1318 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1319 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1320 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1321 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1326 ret = radeon_hwmon_init(rdev); in radeon_pm_init_old()
1330 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1332 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1333 if (radeon_debugfs_pm_init(rdev)) { in radeon_pm_init_old()
1343 static void radeon_dpm_print_power_states(struct radeon_device *rdev) in radeon_dpm_print_power_states() argument
1347 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1349 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1353 static int radeon_pm_init_dpm(struct radeon_device *rdev) in radeon_pm_init_dpm() argument
1358 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1359 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1360 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1361 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1362 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1363 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1364 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1365 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1367 if (rdev->bios && rdev->is_atom_bios) in radeon_pm_init_dpm()
1368 radeon_atombios_get_power_modes(rdev); in radeon_pm_init_dpm()
1373 ret = radeon_hwmon_init(rdev); in radeon_pm_init_dpm()
1377 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1378 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1379 radeon_dpm_init(rdev); in radeon_pm_init_dpm()
1380 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1382 radeon_dpm_print_power_states(rdev); in radeon_pm_init_dpm()
1383 radeon_dpm_setup_asic(rdev); in radeon_pm_init_dpm()
1384 ret = radeon_dpm_enable(rdev); in radeon_pm_init_dpm()
1385 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1388 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1390 if (radeon_debugfs_pm_init(rdev)) { in radeon_pm_init_dpm()
1399 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1400 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_dpm()
1401 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_dpm()
1402 rdev->mc_fw) { in radeon_pm_init_dpm()
1403 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1404 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1406 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1407 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1409 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1410 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1411 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1412 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1434 int radeon_pm_init(struct radeon_device *rdev) in radeon_pm_init() argument
1441 if (rdev->pdev->vendor == p->chip_vendor && in radeon_pm_init()
1442 rdev->pdev->device == p->chip_device && in radeon_pm_init()
1443 rdev->pdev->subsystem_vendor == p->subsys_vendor && in radeon_pm_init()
1444 rdev->pdev->subsystem_device == p->subsys_device) { in radeon_pm_init()
1452 switch (rdev->family) { in radeon_pm_init()
1462 if (!rdev->rlc_fw) in radeon_pm_init()
1463 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1464 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1465 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1466 (!rdev->smc_fw)) in radeon_pm_init()
1467 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1469 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1471 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1500 if (!rdev->rlc_fw) in radeon_pm_init()
1501 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1502 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1503 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1504 (!rdev->smc_fw)) in radeon_pm_init()
1505 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1507 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1509 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1511 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1515 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1519 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1520 return radeon_pm_init_dpm(rdev); in radeon_pm_init()
1522 return radeon_pm_init_old(rdev); in radeon_pm_init()
1525 int radeon_pm_late_init(struct radeon_device *rdev) in radeon_pm_late_init() argument
1529 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1530 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1531 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1532 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_late_init()
1535 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_late_init()
1539 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1542 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1545 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1548 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1549 ret = radeon_dpm_late_enable(rdev); in radeon_pm_late_init()
1550 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1552 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1558 radeon_pm_compute_clocks(rdev); in radeon_pm_late_init()
1562 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1563 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1565 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1568 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1572 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1578 static void radeon_pm_fini_old(struct radeon_device *rdev) in radeon_pm_fini_old() argument
1580 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1581 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1582 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1583 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1584 radeon_pm_update_profile(rdev); in radeon_pm_fini_old()
1585 radeon_pm_set_clocks(rdev); in radeon_pm_fini_old()
1586 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1588 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1589 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1590 radeon_pm_set_clocks(rdev); in radeon_pm_fini_old()
1592 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1594 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1596 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_old()
1597 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_old()
1600 radeon_hwmon_fini(rdev); in radeon_pm_fini_old()
1601 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1604 static void radeon_pm_fini_dpm(struct radeon_device *rdev) in radeon_pm_fini_dpm() argument
1606 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1607 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1608 radeon_dpm_disable(rdev); in radeon_pm_fini_dpm()
1609 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1611 device_remove_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_fini_dpm()
1612 device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_fini_dpm()
1614 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_dpm()
1615 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_dpm()
1617 radeon_dpm_fini(rdev); in radeon_pm_fini_dpm()
1619 radeon_hwmon_fini(rdev); in radeon_pm_fini_dpm()
1620 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1623 void radeon_pm_fini(struct radeon_device *rdev) in radeon_pm_fini() argument
1625 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1626 radeon_pm_fini_dpm(rdev); in radeon_pm_fini()
1628 radeon_pm_fini_old(rdev); in radeon_pm_fini()
1631 static void radeon_pm_compute_clocks_old(struct radeon_device *rdev) in radeon_pm_compute_clocks_old() argument
1633 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_old()
1637 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1640 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1642 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1643 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1644 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_old()
1649 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1650 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1655 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1656 radeon_pm_update_profile(rdev); in radeon_pm_compute_clocks_old()
1657 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1658 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1659 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1660 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1661 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1662 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1664 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1665 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1666 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1667 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1671 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1674 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1675 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1676 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1677 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1678 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1680 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1682 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1683 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1684 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1689 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1690 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1692 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1693 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1694 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1695 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1701 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1704 static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev) in radeon_pm_compute_clocks_dpm() argument
1706 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_dpm()
1710 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1713 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1716 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1717 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1718 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_dpm()
1723 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1724 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1731 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1733 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1735 radeon_dpm_change_power_state_locked(rdev); in radeon_pm_compute_clocks_dpm()
1737 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1741 void radeon_pm_compute_clocks(struct radeon_device *rdev) in radeon_pm_compute_clocks() argument
1743 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1744 radeon_pm_compute_clocks_dpm(rdev); in radeon_pm_compute_clocks()
1746 radeon_pm_compute_clocks_old(rdev); in radeon_pm_compute_clocks()
1749 static bool radeon_pm_in_vbl(struct radeon_device *rdev) in radeon_pm_in_vbl() argument
1757 for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { in radeon_pm_in_vbl()
1758 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1759 vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, in radeon_pm_in_vbl()
1763 &rdev->mode_info.crtcs[crtc]->base.hwmode); in radeon_pm_in_vbl()
1773 static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) in radeon_pm_debug_check_in_vbl() argument
1776 bool in_vbl = radeon_pm_in_vbl(rdev); in radeon_pm_debug_check_in_vbl()
1786 struct radeon_device *rdev; in radeon_dynpm_idle_work_handler() local
1788 rdev = container_of(work, struct radeon_device, in radeon_dynpm_idle_work_handler()
1791 resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); in radeon_dynpm_idle_work_handler()
1792 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1793 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1798 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dynpm_idle_work_handler()
1801 not_processed += radeon_fence_count_emitted(rdev, i); in radeon_dynpm_idle_work_handler()
1808 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1809 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1810 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1811 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1812 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1814 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1818 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1819 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1820 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1821 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1822 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1824 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1832 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1833 jiffies > rdev->pm.dynpm_action_timeout) { in radeon_dynpm_idle_work_handler()
1834 radeon_pm_get_dynpm_state(rdev); in radeon_dynpm_idle_work_handler()
1835 radeon_pm_set_clocks(rdev); in radeon_dynpm_idle_work_handler()
1838 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1841 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1842 ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); in radeon_dynpm_idle_work_handler()
1854 struct radeon_device *rdev = dev->dev_private; in radeon_debugfs_pm_info() local
1855 struct drm_device *ddev = rdev->ddev; in radeon_debugfs_pm_info()
1857 if ((rdev->flags & RADEON_IS_PX) && in radeon_debugfs_pm_info()
1860 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info()
1861 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1862 if (rdev->asic->dpm.debugfs_print_current_performance_level) in radeon_debugfs_pm_info()
1863 radeon_dpm_debugfs_print_current_performance_level(rdev, m); in radeon_debugfs_pm_info()
1866 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1868 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1870 if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) in radeon_debugfs_pm_info()
1871 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1873 seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); in radeon_debugfs_pm_info()
1874 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1875 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info()
1876 seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); in radeon_debugfs_pm_info()
1877 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info()
1878 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1879 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info()
1880 seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); in radeon_debugfs_pm_info()
1891 static int radeon_debugfs_pm_init(struct radeon_device *rdev) in radeon_debugfs_pm_init() argument
1894 return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); in radeon_debugfs_pm_init()