100 	rbo->placement.placement = rbo->placements;  in radeon_ttm_placement_from_domain()
101 	rbo->placement.busy_placement = rbo->placements;  in radeon_ttm_placement_from_domain()
108 			rbo->placements[c].fpfn =  in radeon_ttm_placement_from_domain()
110 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |  in radeon_ttm_placement_from_domain()
115 		rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
116 		rbo->placements[c++].flags = TTM_PL_FLAG_WC |  in radeon_ttm_placement_from_domain()
123 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
124 			rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |  in radeon_ttm_placement_from_domain()
129 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
130 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |  in radeon_ttm_placement_from_domain()
134 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
135 			rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |  in radeon_ttm_placement_from_domain()
142 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
143 			rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |  in radeon_ttm_placement_from_domain()
148 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
149 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |  in radeon_ttm_placement_from_domain()
153 			rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
154 			rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |  in radeon_ttm_placement_from_domain()
159 		rbo->placements[c].fpfn = 0;  in radeon_ttm_placement_from_domain()
160 		rbo->placements[c++].flags = TTM_PL_MASK_CACHING |  in radeon_ttm_placement_from_domain()
169 		    (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&  in radeon_ttm_placement_from_domain()
170 		    !rbo->placements[i].fpfn)  in radeon_ttm_placement_from_domain()
171 			rbo->placements[i].lpfn =  in radeon_ttm_placement_from_domain()
174 			rbo->placements[i].lpfn = 0;  in radeon_ttm_placement_from_domain()
358 		if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) &&  in radeon_bo_pin_restricted()
361 			bo->placements[i].lpfn =  in radeon_bo_pin_restricted()
364 			bo->placements[i].lpfn = max_offset >> PAGE_SHIFT;  in radeon_bo_pin_restricted()
366 		bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;  in radeon_bo_pin_restricted()
401 		bo->placements[i].lpfn = 0;  in radeon_bo_unpin()
402 		bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;  in radeon_bo_unpin()
807 		if ((rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&  in radeon_bo_fault_reserve_notify()
808 		    (!rbo->placements[i].lpfn || rbo->placements[i].lpfn > lpfn))  in radeon_bo_fault_reserve_notify()
809 			rbo->placements[i].lpfn = lpfn;  in radeon_bo_fault_reserve_notify()