62 	uint32_t tmp, ack = 0;  in radeon_dp_aux_transfer_native()  local
99 	tmp = RREG32(chan->rec.mask_clk_reg);  in radeon_dp_aux_transfer_native()
100 	tmp |= (1 << 16);  in radeon_dp_aux_transfer_native()
101 	WREG32(chan->rec.mask_clk_reg, tmp);  in radeon_dp_aux_transfer_native()
104 	tmp = RREG32(AUX_CONTROL + aux_offset[instance]);  in radeon_dp_aux_transfer_native()
106 	tmp &= AUX_HPD_SEL(0x7);  in radeon_dp_aux_transfer_native()
107 	tmp |= AUX_HPD_SEL(chan->rec.hpd);  in radeon_dp_aux_transfer_native()
108 	tmp |= AUX_EN | AUX_LS_READ_EN | AUX_HPD_DISCON(0x1);  in radeon_dp_aux_transfer_native()
110 	WREG32(AUX_CONTROL + aux_offset[instance], tmp);  in radeon_dp_aux_transfer_native()
153 		tmp = RREG32(AUX_SW_STATUS + aux_offset[instance]);  in radeon_dp_aux_transfer_native()
154 		if (tmp & AUX_SW_DONE) {  in radeon_dp_aux_transfer_native()
161 		DRM_ERROR("auxch hw never signalled completion, error %08x\n", tmp);  in radeon_dp_aux_transfer_native()
166 	if (tmp & AUX_SW_RX_TIMEOUT) {  in radeon_dp_aux_transfer_native()
171 	if (tmp & AUX_RX_ERROR_FLAGS) {  in radeon_dp_aux_transfer_native()
172 		DRM_DEBUG_KMS("dp_aux_ch flags not zero: %08x\n", tmp);  in radeon_dp_aux_transfer_native()
177 	bytes = AUX_SW_REPLY_GET_BYTE_COUNT(tmp);  in radeon_dp_aux_transfer_native()
182 		tmp = RREG32(AUX_SW_DATA + aux_offset[instance]);  in radeon_dp_aux_transfer_native()
183 		ack = (tmp >> 8) & 0xff;  in radeon_dp_aux_transfer_native()
186 			tmp = RREG32(AUX_SW_DATA + aux_offset[instance]);  in radeon_dp_aux_transfer_native()
188 				buf[i] = (tmp >> 8) & 0xff;  in radeon_dp_aux_transfer_native()