Lines Matching refs:i2c
420 struct radeon_i2c_bus_rec i2c; in combios_setup_i2c_bus() local
493 i2c.mask_clk_reg = RADEON_GPIOPAD_MASK; in combios_setup_i2c_bus()
494 i2c.mask_data_reg = RADEON_GPIOPAD_MASK; in combios_setup_i2c_bus()
495 i2c.a_clk_reg = RADEON_GPIOPAD_A; in combios_setup_i2c_bus()
496 i2c.a_data_reg = RADEON_GPIOPAD_A; in combios_setup_i2c_bus()
497 i2c.en_clk_reg = RADEON_GPIOPAD_EN; in combios_setup_i2c_bus()
498 i2c.en_data_reg = RADEON_GPIOPAD_EN; in combios_setup_i2c_bus()
499 i2c.y_clk_reg = RADEON_GPIOPAD_Y; in combios_setup_i2c_bus()
500 i2c.y_data_reg = RADEON_GPIOPAD_Y; in combios_setup_i2c_bus()
502 i2c.mask_clk_reg = RADEON_MDGPIO_MASK; in combios_setup_i2c_bus()
503 i2c.mask_data_reg = RADEON_MDGPIO_MASK; in combios_setup_i2c_bus()
504 i2c.a_clk_reg = RADEON_MDGPIO_A; in combios_setup_i2c_bus()
505 i2c.a_data_reg = RADEON_MDGPIO_A; in combios_setup_i2c_bus()
506 i2c.en_clk_reg = RADEON_MDGPIO_EN; in combios_setup_i2c_bus()
507 i2c.en_data_reg = RADEON_MDGPIO_EN; in combios_setup_i2c_bus()
508 i2c.y_clk_reg = RADEON_MDGPIO_Y; in combios_setup_i2c_bus()
509 i2c.y_data_reg = RADEON_MDGPIO_Y; in combios_setup_i2c_bus()
511 i2c.mask_clk_reg = ddc_line; in combios_setup_i2c_bus()
512 i2c.mask_data_reg = ddc_line; in combios_setup_i2c_bus()
513 i2c.a_clk_reg = ddc_line; in combios_setup_i2c_bus()
514 i2c.a_data_reg = ddc_line; in combios_setup_i2c_bus()
515 i2c.en_clk_reg = ddc_line; in combios_setup_i2c_bus()
516 i2c.en_data_reg = ddc_line; in combios_setup_i2c_bus()
517 i2c.y_clk_reg = ddc_line; in combios_setup_i2c_bus()
518 i2c.y_data_reg = ddc_line; in combios_setup_i2c_bus()
523 i2c.mask_clk_mask = clk_mask; in combios_setup_i2c_bus()
524 i2c.mask_data_mask = data_mask; in combios_setup_i2c_bus()
525 i2c.a_clk_mask = clk_mask; in combios_setup_i2c_bus()
526 i2c.a_data_mask = data_mask; in combios_setup_i2c_bus()
527 i2c.en_clk_mask = clk_mask; in combios_setup_i2c_bus()
528 i2c.en_data_mask = data_mask; in combios_setup_i2c_bus()
529 i2c.y_clk_mask = clk_mask; in combios_setup_i2c_bus()
530 i2c.y_data_mask = data_mask; in combios_setup_i2c_bus()
534 i2c.mask_clk_mask = (0x20 << 8); in combios_setup_i2c_bus()
535 i2c.mask_data_mask = 0x80; in combios_setup_i2c_bus()
536 i2c.a_clk_mask = (0x20 << 8); in combios_setup_i2c_bus()
537 i2c.a_data_mask = 0x80; in combios_setup_i2c_bus()
538 i2c.en_clk_mask = (0x20 << 8); in combios_setup_i2c_bus()
539 i2c.en_data_mask = 0x80; in combios_setup_i2c_bus()
540 i2c.y_clk_mask = (0x20 << 8); in combios_setup_i2c_bus()
541 i2c.y_data_mask = 0x80; in combios_setup_i2c_bus()
544 i2c.mask_clk_mask = RADEON_GPIO_MASK_1; in combios_setup_i2c_bus()
545 i2c.mask_data_mask = RADEON_GPIO_MASK_0; in combios_setup_i2c_bus()
546 i2c.a_clk_mask = RADEON_GPIO_A_1; in combios_setup_i2c_bus()
547 i2c.a_data_mask = RADEON_GPIO_A_0; in combios_setup_i2c_bus()
548 i2c.en_clk_mask = RADEON_GPIO_EN_1; in combios_setup_i2c_bus()
549 i2c.en_data_mask = RADEON_GPIO_EN_0; in combios_setup_i2c_bus()
550 i2c.y_clk_mask = RADEON_GPIO_Y_1; in combios_setup_i2c_bus()
551 i2c.y_data_mask = RADEON_GPIO_Y_0; in combios_setup_i2c_bus()
563 i2c.hw_capable = true; in combios_setup_i2c_bus()
566 i2c.hw_capable = false; in combios_setup_i2c_bus()
574 i2c.hw_capable = true; in combios_setup_i2c_bus()
577 i2c.hw_capable = false; in combios_setup_i2c_bus()
587 i2c.hw_capable = true; in combios_setup_i2c_bus()
590 i2c.hw_capable = false; in combios_setup_i2c_bus()
599 i2c.hw_capable = true; in combios_setup_i2c_bus()
602 i2c.hw_capable = false; in combios_setup_i2c_bus()
613 i2c.hw_capable = true; in combios_setup_i2c_bus()
619 i2c.hw_capable = false; in combios_setup_i2c_bus()
622 i2c.hw_capable = false; in combios_setup_i2c_bus()
627 i2c.hw_capable = false; in combios_setup_i2c_bus()
630 i2c.mm_i2c = false; in combios_setup_i2c_bus()
632 i2c.i2c_id = ddc; in combios_setup_i2c_bus()
633 i2c.hpd = RADEON_HPD_NONE; in combios_setup_i2c_bus()
636 i2c.valid = true; in combios_setup_i2c_bus()
638 i2c.valid = false; in combios_setup_i2c_bus()
640 return i2c; in combios_setup_i2c_bus()
646 struct radeon_i2c_bus_rec i2c; in radeon_combios_get_i2c_info_from_table() local
651 i2c.valid = false; in radeon_combios_get_i2c_info_from_table()
662 i2c = combios_setup_i2c_bus(rdev, DDC_MONID, in radeon_combios_get_i2c_info_from_table()
668 return i2c; in radeon_combios_get_i2c_info_from_table()
674 struct radeon_i2c_bus_rec i2c; in radeon_combios_i2c_init() local
688 i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); in radeon_combios_i2c_init()
689 rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC"); in radeon_combios_i2c_init()
691 i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); in radeon_combios_i2c_init()
692 rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC"); in radeon_combios_i2c_init()
695 i2c.valid = true; in radeon_combios_i2c_init()
696 i2c.hw_capable = true; in radeon_combios_i2c_init()
697 i2c.mm_i2c = true; in radeon_combios_i2c_init()
698 i2c.i2c_id = 0xa0; in radeon_combios_i2c_init()
699 rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C"); in radeon_combios_i2c_init()
708 i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); in radeon_combios_i2c_init()
709 rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); in radeon_combios_i2c_init()
712 i2c = radeon_combios_get_i2c_info_from_table(rdev); in radeon_combios_i2c_init()
713 if (i2c.valid) in radeon_combios_i2c_init()
714 rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK"); in radeon_combios_i2c_init()
718 i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); in radeon_combios_i2c_init()
719 rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); in radeon_combios_i2c_init()
722 i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); in radeon_combios_i2c_init()
723 rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); in radeon_combios_i2c_init()
725 i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); in radeon_combios_i2c_init()
726 rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC"); in radeon_combios_i2c_init()