421 	int ddc_line = 0;  in combios_setup_i2c_bus()  local
448 		ddc_line = 0;  in combios_setup_i2c_bus()
451 		ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
454 		ddc_line = RADEON_GPIO_VGA_DDC;  in combios_setup_i2c_bus()
457 		ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
460 		ddc_line = RADEON_MDGPIO_MASK;  in combios_setup_i2c_bus()
466 			ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
469 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
472 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
478 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
483 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
485 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
488 			ddc_line = RADEON_GPIO_CRT2_DDC;  in combios_setup_i2c_bus()
492 	if (ddc_line == RADEON_GPIOPAD_MASK) {  in combios_setup_i2c_bus()
501 	} else if (ddc_line == RADEON_MDGPIO_MASK) {  in combios_setup_i2c_bus()
511 		i2c.mask_clk_reg = ddc_line;  in combios_setup_i2c_bus()
512 		i2c.mask_data_reg = ddc_line;  in combios_setup_i2c_bus()
513 		i2c.a_clk_reg = ddc_line;  in combios_setup_i2c_bus()
514 		i2c.a_data_reg = ddc_line;  in combios_setup_i2c_bus()
515 		i2c.en_clk_reg = ddc_line;  in combios_setup_i2c_bus()
516 		i2c.en_data_reg = ddc_line;  in combios_setup_i2c_bus()
517 		i2c.y_clk_reg = ddc_line;  in combios_setup_i2c_bus()
518 		i2c.y_data_reg = ddc_line;  in combios_setup_i2c_bus()
531 	} else if ((ddc_line == RADEON_GPIOPAD_MASK) ||  in combios_setup_i2c_bus()
532 		   (ddc_line == RADEON_MDGPIO_MASK)) {  in combios_setup_i2c_bus()
561 		switch (ddc_line) {  in combios_setup_i2c_bus()
571 		switch (ddc_line) {  in combios_setup_i2c_bus()
583 		switch (ddc_line) {  in combios_setup_i2c_bus()
596 		switch (ddc_line) {  in combios_setup_i2c_bus()
610 		switch (ddc_line) {  in combios_setup_i2c_bus()
635 	if (ddc_line)  in combios_setup_i2c_bus()