35 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)  in radeon_legacy_get_engine_clock()  argument
37 	struct radeon_pll *spll = &rdev->clock.spll;  in radeon_legacy_get_engine_clock()
65 uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)  in radeon_legacy_get_memory_clock()  argument
67 	struct radeon_pll *mpll = &rdev->clock.mpll;  in radeon_legacy_get_memory_clock()
101 	struct radeon_device *rdev = dev->dev_private;  in radeon_read_clocks_OF()  local
102 	struct device_node *dp = rdev->pdev->dev.of_node;  in radeon_read_clocks_OF()
104 	struct radeon_pll *p1pll = &rdev->clock.p1pll;  in radeon_read_clocks_OF()
105 	struct radeon_pll *p2pll = &rdev->clock.p2pll;  in radeon_read_clocks_OF()
106 	struct radeon_pll *spll = &rdev->clock.spll;  in radeon_read_clocks_OF()
107 	struct radeon_pll *mpll = &rdev->clock.mpll;  in radeon_read_clocks_OF()
123 	if (rdev->family >= CHIP_R420) {  in radeon_read_clocks_OF()
143 	rdev->clock.max_pixel_clock = 35000;  in radeon_read_clocks_OF()
152 		rdev->clock.default_sclk = (*val) / 10;  in radeon_read_clocks_OF()
154 		rdev->clock.default_sclk =  in radeon_read_clocks_OF()
155 			radeon_legacy_get_engine_clock(rdev);  in radeon_read_clocks_OF()
159 		rdev->clock.default_mclk = (*val) / 10;  in radeon_read_clocks_OF()
161 		rdev->clock.default_mclk =  in radeon_read_clocks_OF()
162 			radeon_legacy_get_memory_clock(rdev);  in radeon_read_clocks_OF()
177 	struct radeon_device *rdev = dev->dev_private;  in radeon_get_clock_info()  local
178 	struct radeon_pll *p1pll = &rdev->clock.p1pll;  in radeon_get_clock_info()
179 	struct radeon_pll *p2pll = &rdev->clock.p2pll;  in radeon_get_clock_info()
180 	struct radeon_pll *dcpll = &rdev->clock.dcpll;  in radeon_get_clock_info()
181 	struct radeon_pll *spll = &rdev->clock.spll;  in radeon_get_clock_info()
182 	struct radeon_pll *mpll = &rdev->clock.mpll;  in radeon_get_clock_info()
185 	if (rdev->is_atom_bios)  in radeon_get_clock_info()
194 			if (!ASIC_IS_AVIVO(rdev)) {  in radeon_get_clock_info()
196 				if (ASIC_IS_R300(rdev))  in radeon_get_clock_info()
208 		if (rdev->family < CHIP_RS600) {  in radeon_get_clock_info()
217 		if (ASIC_IS_AVIVO(rdev)) {  in radeon_get_clock_info()
223 			rdev->clock.max_pixel_clock = 35000;  in radeon_get_clock_info()
225 			if (rdev->flags & RADEON_IS_IGP) {  in radeon_get_clock_info()
242 			if (rdev->family >= CHIP_R420) {  in radeon_get_clock_info()
266 			rdev->clock.default_sclk =  in radeon_get_clock_info()
267 			    radeon_legacy_get_engine_clock(rdev);  in radeon_get_clock_info()
268 			rdev->clock.default_mclk =  in radeon_get_clock_info()
269 			    radeon_legacy_get_memory_clock(rdev);  in radeon_get_clock_info()
274 	if (ASIC_IS_AVIVO(rdev)) {  in radeon_get_clock_info()
335 	if (!rdev->clock.default_sclk)  in radeon_get_clock_info()
336 		rdev->clock.default_sclk = radeon_get_engine_clock(rdev);  in radeon_get_clock_info()
337 	if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock)  in radeon_get_clock_info()
338 		rdev->clock.default_mclk = radeon_get_memory_clock(rdev);  in radeon_get_clock_info()
340 	rdev->pm.current_sclk = rdev->clock.default_sclk;  in radeon_get_clock_info()
341 	rdev->pm.current_mclk = rdev->clock.default_mclk;  in radeon_get_clock_info()
346 static uint32_t calc_eng_mem_clock(struct radeon_device *rdev,  in calc_eng_mem_clock()  argument
350 	struct radeon_pll *spll = &rdev->clock.spll;  in calc_eng_mem_clock()
385 void radeon_legacy_set_engine_clock(struct radeon_device *rdev,  in radeon_legacy_set_engine_clock()  argument
393 	eng_clock = calc_eng_mem_clock(rdev, eng_clock, &fb_div, &post_div);  in radeon_legacy_set_engine_clock()
471 void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)  in radeon_legacy_set_clock_gating()  argument
476 		if (rdev->flags & RADEON_SINGLE_CRTC) {  in radeon_legacy_set_clock_gating()
492 		} else if (ASIC_IS_R300(rdev)) {  in radeon_legacy_set_clock_gating()
493 			if ((rdev->family == CHIP_RS400) ||  in radeon_legacy_set_clock_gating()
494 			    (rdev->family == CHIP_RS480)) {  in radeon_legacy_set_clock_gating()
541 			} else if (rdev->family >= CHIP_RV350) {  in radeon_legacy_set_clock_gating()
616 					if (rdev->mc.vram_width == 64) {  in radeon_legacy_set_clock_gating()
669 			if (((rdev->family == CHIP_RV250) &&  in radeon_legacy_set_clock_gating()
673 			    || ((rdev->family == CHIP_RV100)  in radeon_legacy_set_clock_gating()
684 			if ((rdev->family == CHIP_RV200) ||  in radeon_legacy_set_clock_gating()
685 			    (rdev->family == CHIP_RV250) ||  in radeon_legacy_set_clock_gating()
686 			    (rdev->family == CHIP_RV280)) {  in radeon_legacy_set_clock_gating()
691 				if (((rdev->family == CHIP_RV200) ||  in radeon_legacy_set_clock_gating()
692 				     (rdev->family == CHIP_RV250)) &&  in radeon_legacy_set_clock_gating()
703 			if (((rdev->family == CHIP_RV200) ||  in radeon_legacy_set_clock_gating()
704 			     (rdev->family == CHIP_RV250)) &&  in radeon_legacy_set_clock_gating()
736 		if (rdev->flags & RADEON_SINGLE_CRTC) {  in radeon_legacy_set_clock_gating()
746 		} else if ((rdev->family == CHIP_RS400) ||  in radeon_legacy_set_clock_gating()
747 			   (rdev->family == CHIP_RS480)) {  in radeon_legacy_set_clock_gating()
785 		} else if (rdev->family >= CHIP_RV350) {  in radeon_legacy_set_clock_gating()
841 			if (rdev->flags & RADEON_SINGLE_CRTC) {  in radeon_legacy_set_clock_gating()
853 			} else if ((rdev->family == CHIP_R300) ||  in radeon_legacy_set_clock_gating()
854 				   (rdev->family == CHIP_R350)) {  in radeon_legacy_set_clock_gating()
866 			if ((rdev->family == CHIP_R300) ||  in radeon_legacy_set_clock_gating()
867 			    (rdev->family == CHIP_R350)) {  in radeon_legacy_set_clock_gating()
876 			if (rdev->flags & RADEON_IS_IGP) {  in radeon_legacy_set_clock_gating()
884 			if ((rdev->family == CHIP_RV200) ||  in radeon_legacy_set_clock_gating()
885 			    (rdev->family == CHIP_RV250) ||  in radeon_legacy_set_clock_gating()
886 			    (rdev->family == CHIP_RV280)) {  in radeon_legacy_set_clock_gating()