40 	fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_get_engine_clock()
46 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;  in radeon_legacy_get_engine_clock()
53 	post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;  in radeon_legacy_get_engine_clock()
70 	fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_get_memory_clock()
76 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;  in radeon_legacy_get_memory_clock()
83 	post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;  in radeon_legacy_get_memory_clock()
117 	p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;  in radeon_read_clocks_OF()
147 		RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_read_clocks_OF()
195 				u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);  in radeon_get_clock_info()
211 					RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_get_clock_info()
237 			    RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;  in radeon_get_clock_info()
263 			    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_get_clock_info()
355 		    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in calc_eng_mem_clock()
395 	tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_engine_clock()
399 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
405 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
411 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
417 	tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_set_engine_clock()
423 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
431 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
437 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
443 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
464 	tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_engine_clock()
477 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
495 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
516 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
521 				tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
526 				tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
542 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
551 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
569 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
574 				tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
579 				tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
595 				tmp = RREG32_PLL(RADEON_MCLK_MISC);  in radeon_legacy_set_clock_gating()
600 				tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
615 					tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
632 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
638 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
645 			tmp = RREG32_PLL(RADEON_CLK_PWRMGT_CNTL);  in radeon_legacy_set_clock_gating()
656 			tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_clock_gating()
664 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
687 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
708 				tmp = RREG32_PLL(RADEON_PLL_PWRMGT_CNTL);  in radeon_legacy_set_clock_gating()
715 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
727 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
737 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
748 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
759 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
763 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
769 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
787 			tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
792 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
803 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
807 			tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
814 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
820 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
837 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
868 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
877 				tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
887 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
893 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
905 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()