Lines Matching refs:ulClock
2844 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2858 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2866 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()
2868 dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0; in radeon_atom_get_clock_dividers()
2912 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2917 dividers->real_clock = le32_to_cpu(args.v4.ulClock); in radeon_atom_get_clock_dividers()
2922 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in radeon_atom_get_clock_dividers()
2923 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2932 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); in radeon_atom_get_clock_dividers()
2933 dividers->post_divider = args.v6_out.ulClock.ucPostDiv; in radeon_atom_get_clock_dividers()
2961 args.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_memory_pll_dividers()
3059 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); in radeon_atom_set_engine_dram_timings()