2030 	struct _ATOM_PPLIB_POWERPLAYTABLE pplib;  member
2586 	radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController);  in radeon_atombios_parse_power_table_4_5()
2587 	if (power_info->pplib.ucNumStates == 0)  in radeon_atombios_parse_power_table_4_5()
2590 				       power_info->pplib.ucNumStates, GFP_KERNEL);  in radeon_atombios_parse_power_table_4_5()
2594 	for (i = 0; i < power_info->pplib.ucNumStates; i++) {  in radeon_atombios_parse_power_table_4_5()
2598 			 le16_to_cpu(power_info->pplib.usStateArrayOffset) +  in radeon_atombios_parse_power_table_4_5()
2599 			 i * power_info->pplib.ucStateEntrySize);  in radeon_atombios_parse_power_table_4_5()
2602 			 le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset) +  in radeon_atombios_parse_power_table_4_5()
2604 			  power_info->pplib.ucNonClockSize));  in radeon_atombios_parse_power_table_4_5()
2606 							     ((power_info->pplib.ucStateEntrySize - 1) ?  in radeon_atombios_parse_power_table_4_5()
2607 							      (power_info->pplib.ucStateEntrySize - 1) : 1),  in radeon_atombios_parse_power_table_4_5()
2611 		if (power_info->pplib.ucStateEntrySize - 1) {  in radeon_atombios_parse_power_table_4_5()
2612 			for (j = 0; j < (power_info->pplib.ucStateEntrySize - 1); j++) {  in radeon_atombios_parse_power_table_4_5()
2615 					 le16_to_cpu(power_info->pplib.usClockInfoArrayOffset) +  in radeon_atombios_parse_power_table_4_5()
2617 					  power_info->pplib.ucClockInfoSize));  in radeon_atombios_parse_power_table_4_5()
2678 	radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController);  in radeon_atombios_parse_power_table_6()
2681 		 le16_to_cpu(power_info->pplib.usStateArrayOffset));  in radeon_atombios_parse_power_table_6()
2684 		 le16_to_cpu(power_info->pplib.usClockInfoArrayOffset));  in radeon_atombios_parse_power_table_6()
2687 		 le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset));  in radeon_atombios_parse_power_table_6()