177 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,  in r600_hdmi_update_acr()  argument
186 	WREG32_P(acr_ctl + offset,  in r600_hdmi_update_acr()
192 	WREG32_P(HDMI0_ACR_32_0 + offset,  in r600_hdmi_update_acr()
195 	WREG32_P(HDMI0_ACR_32_1 + offset,  in r600_hdmi_update_acr()
199 	WREG32_P(HDMI0_ACR_44_0 + offset,  in r600_hdmi_update_acr()
202 	WREG32_P(HDMI0_ACR_44_1 + offset,  in r600_hdmi_update_acr()
206 	WREG32_P(HDMI0_ACR_48_0 + offset,  in r600_hdmi_update_acr()
209 	WREG32_P(HDMI0_ACR_48_1 + offset,  in r600_hdmi_update_acr()
217 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,  in r600_set_avi_packet()  argument
222 	WREG32(HDMI0_AVI_INFO0 + offset,  in r600_set_avi_packet()
224 	WREG32(HDMI0_AVI_INFO1 + offset,  in r600_set_avi_packet()
226 	WREG32(HDMI0_AVI_INFO2 + offset,  in r600_set_avi_packet()
228 	WREG32(HDMI0_AVI_INFO3 + offset,  in r600_set_avi_packet()
231 	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,  in r600_set_avi_packet()
234 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_set_avi_packet()
250 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_update_audio_infoframe()  local
253 	WREG32(HDMI0_AUDIO_INFO0 + offset,  in r600_hdmi_update_audio_infoframe()
255 	WREG32(HDMI0_AUDIO_INFO1 + offset,  in r600_hdmi_update_audio_infoframe()
268 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_is_audio_buffer_filled()  local
270 	return (RREG32(HDMI0_STATUS + offset) & 0x10) != 0;  in r600_hdmi_is_audio_buffer_filled()
301 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_audio_workaround()  local
310 	WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_hdmi_audio_workaround()
340 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset)  in r600_set_vbi_packet()  argument
345 	WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,  in r600_set_vbi_packet()
351 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset)  in r600_set_audio_packet()  argument
356 	WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_set_audio_packet()
366 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_set_audio_packet()
370 	WREG32_P(HDMI0_INFOFRAME_CONTROL1 + offset,  in r600_set_audio_packet()
374 	WREG32_AND(HDMI0_GENERIC_PACKET_CONTROL + offset,  in r600_set_audio_packet()
383 	WREG32_P(HDMI0_60958_0 + offset,  in r600_set_audio_packet()
388 	WREG32_P(HDMI0_60958_1 + offset,  in r600_set_audio_packet()
393 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute)  in r600_set_mute()  argument
399 		WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);  in r600_set_mute()
401 		WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE);  in r600_set_mute()
420 	uint32_t offset;  in r600_hdmi_update_audio_settings()  local
426 	offset = dig->afmt->offset;  in r600_hdmi_update_audio_settings()
448 	value = RREG32(HDMI0_AUDIO_PACKET_CONTROL + offset);  in r600_hdmi_update_audio_settings()
450 		WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_hdmi_update_audio_settings()
453 	WREG32_OR(HDMI0_CONTROL + offset,  in r600_hdmi_update_audio_settings()
456 	WREG32_AND(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_hdmi_update_audio_settings()
461 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_hdmi_update_audio_settings()
518 		WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);  in r600_hdmi_enable()
533 		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);  in r600_hdmi_enable()