Lines Matching refs:rdev

141 void r600_dpm_print_ps_status(struct radeon_device *rdev,  in r600_dpm_print_ps_status()  argument
145 if (rps == rdev->pm.dpm.current_ps) in r600_dpm_print_ps_status()
147 if (rps == rdev->pm.dpm.requested_ps) in r600_dpm_print_ps_status()
149 if (rps == rdev->pm.dpm.boot_ps) in r600_dpm_print_ps_status()
154 u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) in r600_dpm_get_vblank_time() argument
156 struct drm_device *dev = rdev->ddev; in r600_dpm_get_vblank_time()
162 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in r600_dpm_get_vblank_time()
180 u32 r600_dpm_get_vrefresh(struct radeon_device *rdev) in r600_dpm_get_vrefresh() argument
182 struct drm_device *dev = rdev->ddev; in r600_dpm_get_vrefresh()
187 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in r600_dpm_get_vrefresh()
239 void r600_gfx_clockgating_enable(struct radeon_device *rdev, bool enable) in r600_gfx_clockgating_enable() argument
250 for (i = 0; i < rdev->usec_timeout; i++) { in r600_gfx_clockgating_enable()
263 void r600_dynamicpm_enable(struct radeon_device *rdev, bool enable) in r600_dynamicpm_enable() argument
271 void r600_enable_thermal_protection(struct radeon_device *rdev, bool enable) in r600_enable_thermal_protection() argument
279 void r600_enable_acpi_pm(struct radeon_device *rdev) in r600_enable_acpi_pm() argument
284 void r600_enable_dynamic_pcie_gen2(struct radeon_device *rdev, bool enable) in r600_enable_dynamic_pcie_gen2() argument
292 bool r600_dynamicpm_enabled(struct radeon_device *rdev) in r600_dynamicpm_enabled() argument
300 void r600_enable_sclk_control(struct radeon_device *rdev, bool enable) in r600_enable_sclk_control() argument
308 void r600_enable_mclk_control(struct radeon_device *rdev, bool enable) in r600_enable_mclk_control() argument
316 void r600_enable_spll_bypass(struct radeon_device *rdev, bool enable) in r600_enable_spll_bypass() argument
324 void r600_wait_for_spll_change(struct radeon_device *rdev) in r600_wait_for_spll_change() argument
328 for (i = 0; i < rdev->usec_timeout; i++) { in r600_wait_for_spll_change()
335 void r600_set_bsp(struct radeon_device *rdev, u32 u, u32 p) in r600_set_bsp() argument
340 void r600_set_at(struct radeon_device *rdev, in r600_set_at() argument
348 void r600_set_tc(struct radeon_device *rdev, in r600_set_tc() argument
354 void r600_select_td(struct radeon_device *rdev, in r600_select_td() argument
367 void r600_set_vrc(struct radeon_device *rdev, u32 vrv) in r600_set_vrc() argument
372 void r600_set_tpu(struct radeon_device *rdev, u32 u) in r600_set_tpu() argument
377 void r600_set_tpc(struct radeon_device *rdev, u32 c) in r600_set_tpc() argument
382 void r600_set_sstu(struct radeon_device *rdev, u32 u) in r600_set_sstu() argument
387 void r600_set_sst(struct radeon_device *rdev, u32 t) in r600_set_sst() argument
392 void r600_set_git(struct radeon_device *rdev, u32 t) in r600_set_git() argument
397 void r600_set_fctu(struct radeon_device *rdev, u32 u) in r600_set_fctu() argument
402 void r600_set_fct(struct radeon_device *rdev, u32 t) in r600_set_fct() argument
407 void r600_set_ctxcgtt3d_rphc(struct radeon_device *rdev, u32 p) in r600_set_ctxcgtt3d_rphc() argument
412 void r600_set_ctxcgtt3d_rsdc(struct radeon_device *rdev, u32 s) in r600_set_ctxcgtt3d_rsdc() argument
417 void r600_set_vddc3d_oorsu(struct radeon_device *rdev, u32 u) in r600_set_vddc3d_oorsu() argument
422 void r600_set_vddc3d_oorphc(struct radeon_device *rdev, u32 p) in r600_set_vddc3d_oorphc() argument
427 void r600_set_vddc3d_oorsdc(struct radeon_device *rdev, u32 s) in r600_set_vddc3d_oorsdc() argument
432 void r600_set_mpll_lock_time(struct radeon_device *rdev, u32 lock_time) in r600_set_mpll_lock_time() argument
437 void r600_set_mpll_reset_time(struct radeon_device *rdev, u32 reset_time) in r600_set_mpll_reset_time() argument
442 void r600_engine_clock_entry_enable(struct radeon_device *rdev, in r600_engine_clock_entry_enable() argument
453 void r600_engine_clock_entry_enable_pulse_skipping(struct radeon_device *rdev, in r600_engine_clock_entry_enable_pulse_skipping() argument
464 void r600_engine_clock_entry_enable_post_divider(struct radeon_device *rdev, in r600_engine_clock_entry_enable_post_divider() argument
475 void r600_engine_clock_entry_set_post_divider(struct radeon_device *rdev, in r600_engine_clock_entry_set_post_divider() argument
482 void r600_engine_clock_entry_set_reference_divider(struct radeon_device *rdev, in r600_engine_clock_entry_set_reference_divider() argument
489 void r600_engine_clock_entry_set_feedback_divider(struct radeon_device *rdev, in r600_engine_clock_entry_set_feedback_divider() argument
496 void r600_engine_clock_entry_set_step_time(struct radeon_device *rdev, in r600_engine_clock_entry_set_step_time() argument
503 void r600_vid_rt_set_ssu(struct radeon_device *rdev, u32 u) in r600_vid_rt_set_ssu() argument
508 void r600_vid_rt_set_vru(struct radeon_device *rdev, u32 u) in r600_vid_rt_set_vru() argument
513 void r600_vid_rt_set_vrt(struct radeon_device *rdev, u32 rt) in r600_vid_rt_set_vrt() argument
518 void r600_voltage_control_enable_pins(struct radeon_device *rdev, in r600_voltage_control_enable_pins() argument
526 void r600_voltage_control_program_voltages(struct radeon_device *rdev, in r600_voltage_control_program_voltages() argument
540 void r600_voltage_control_deactivate_static_control(struct radeon_device *rdev, in r600_voltage_control_deactivate_static_control() argument
558 void r600_power_level_enable(struct radeon_device *rdev, in r600_power_level_enable() argument
571 void r600_power_level_set_voltage_index(struct radeon_device *rdev, in r600_power_level_set_voltage_index() argument
580 void r600_power_level_set_mem_clock_index(struct radeon_device *rdev, in r600_power_level_set_mem_clock_index() argument
589 void r600_power_level_set_eng_clock_index(struct radeon_device *rdev, in r600_power_level_set_eng_clock_index() argument
598 void r600_power_level_set_watermark_id(struct radeon_device *rdev, in r600_power_level_set_watermark_id() argument
610 void r600_power_level_set_pcie_gen2(struct radeon_device *rdev, in r600_power_level_set_pcie_gen2() argument
621 enum r600_power_level r600_power_level_get_current_index(struct radeon_device *rdev) in r600_power_level_get_current_index() argument
630 enum r600_power_level r600_power_level_get_target_index(struct radeon_device *rdev) in r600_power_level_get_target_index() argument
639 void r600_power_level_set_enter_index(struct radeon_device *rdev, in r600_power_level_set_enter_index() argument
646 void r600_wait_for_power_level_unequal(struct radeon_device *rdev, in r600_wait_for_power_level_unequal() argument
651 for (i = 0; i < rdev->usec_timeout; i++) { in r600_wait_for_power_level_unequal()
652 if (r600_power_level_get_target_index(rdev) != index) in r600_wait_for_power_level_unequal()
657 for (i = 0; i < rdev->usec_timeout; i++) { in r600_wait_for_power_level_unequal()
658 if (r600_power_level_get_current_index(rdev) != index) in r600_wait_for_power_level_unequal()
664 void r600_wait_for_power_level(struct radeon_device *rdev, in r600_wait_for_power_level() argument
669 for (i = 0; i < rdev->usec_timeout; i++) { in r600_wait_for_power_level()
670 if (r600_power_level_get_target_index(rdev) == index) in r600_wait_for_power_level()
675 for (i = 0; i < rdev->usec_timeout; i++) { in r600_wait_for_power_level()
676 if (r600_power_level_get_current_index(rdev) == index) in r600_wait_for_power_level()
682 void r600_start_dpm(struct radeon_device *rdev) in r600_start_dpm() argument
684 r600_enable_sclk_control(rdev, false); in r600_start_dpm()
685 r600_enable_mclk_control(rdev, false); in r600_start_dpm()
687 r600_dynamicpm_enable(rdev, true); in r600_start_dpm()
689 radeon_wait_for_vblank(rdev, 0); in r600_start_dpm()
690 radeon_wait_for_vblank(rdev, 1); in r600_start_dpm()
692 r600_enable_spll_bypass(rdev, true); in r600_start_dpm()
693 r600_wait_for_spll_change(rdev); in r600_start_dpm()
694 r600_enable_spll_bypass(rdev, false); in r600_start_dpm()
695 r600_wait_for_spll_change(rdev); in r600_start_dpm()
697 r600_enable_spll_bypass(rdev, true); in r600_start_dpm()
698 r600_wait_for_spll_change(rdev); in r600_start_dpm()
699 r600_enable_spll_bypass(rdev, false); in r600_start_dpm()
700 r600_wait_for_spll_change(rdev); in r600_start_dpm()
702 r600_enable_sclk_control(rdev, true); in r600_start_dpm()
703 r600_enable_mclk_control(rdev, true); in r600_start_dpm()
706 void r600_stop_dpm(struct radeon_device *rdev) in r600_stop_dpm() argument
708 r600_dynamicpm_enable(rdev, false); in r600_stop_dpm()
711 int r600_dpm_pre_set_power_state(struct radeon_device *rdev) in r600_dpm_pre_set_power_state() argument
716 void r600_dpm_post_set_power_state(struct radeon_device *rdev) in r600_dpm_post_set_power_state() argument
736 static int r600_set_thermal_temperature_range(struct radeon_device *rdev, in r600_set_thermal_temperature_range() argument
755 rdev->pm.dpm.thermal.min_temp = low_temp; in r600_set_thermal_temperature_range()
756 rdev->pm.dpm.thermal.max_temp = high_temp; in r600_set_thermal_temperature_range()
784 int r600_dpm_late_enable(struct radeon_device *rdev) in r600_dpm_late_enable() argument
788 if (rdev->irq.installed && in r600_dpm_late_enable()
789 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { in r600_dpm_late_enable()
790 ret = r600_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); in r600_dpm_late_enable()
793 rdev->irq.dpm_thermal = true; in r600_dpm_late_enable()
794 radeon_irq_set(rdev); in r600_dpm_late_enable()
842 int r600_get_platform_caps(struct radeon_device *rdev) in r600_get_platform_caps() argument
844 struct radeon_mode_info *mode_info = &rdev->mode_info; in r600_get_platform_caps()
855 rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in r600_get_platform_caps()
856 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in r600_get_platform_caps()
857 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in r600_get_platform_caps()
870 int r600_parse_extended_power_table(struct radeon_device *rdev) in r600_parse_extended_power_table() argument
872 struct radeon_mode_info *mode_info = &rdev->mode_info; in r600_parse_extended_power_table()
892 rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in r600_parse_extended_power_table()
893 rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin); in r600_parse_extended_power_table()
894 rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed); in r600_parse_extended_power_table()
895 rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh); in r600_parse_extended_power_table()
896 rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin); in r600_parse_extended_power_table()
897 rdev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed); in r600_parse_extended_power_table()
898 rdev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh); in r600_parse_extended_power_table()
900 rdev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax); in r600_parse_extended_power_table()
902 rdev->pm.dpm.fan.t_max = 10900; in r600_parse_extended_power_table()
903 rdev->pm.dpm.fan.cycle_delay = 100000; in r600_parse_extended_power_table()
905 rdev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode; in r600_parse_extended_power_table()
906 rdev->pm.dpm.fan.default_max_fan_pwm = in r600_parse_extended_power_table()
908 rdev->pm.dpm.fan.default_fan_output_sensitivity = 4836; in r600_parse_extended_power_table()
909 rdev->pm.dpm.fan.fan_output_sensitivity = in r600_parse_extended_power_table()
912 rdev->pm.dpm.fan.ucode_fan_control = true; in r600_parse_extended_power_table()
923 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in r600_parse_extended_power_table()
932 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in r600_parse_extended_power_table()
935 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
943 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in r600_parse_extended_power_table()
946 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
947 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
955 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in r600_parse_extended_power_table()
958 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
959 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
960 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries); in r600_parse_extended_power_table()
970 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = in r600_parse_extended_power_table()
973 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = in r600_parse_extended_power_table()
976 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = in r600_parse_extended_power_table()
978 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in r600_parse_extended_power_table()
989 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in r600_parse_extended_power_table()
993 if (!rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { in r600_parse_extended_power_table()
994 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1000 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = in r600_parse_extended_power_table()
1002 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = in r600_parse_extended_power_table()
1004 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = in r600_parse_extended_power_table()
1009 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count = in r600_parse_extended_power_table()
1017 rdev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit); in r600_parse_extended_power_table()
1018 rdev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit); in r600_parse_extended_power_table()
1019 rdev->pm.dpm.near_tdp_limit_adjusted = rdev->pm.dpm.near_tdp_limit; in r600_parse_extended_power_table()
1020 rdev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit); in r600_parse_extended_power_table()
1021 if (rdev->pm.dpm.tdp_od_limit) in r600_parse_extended_power_table()
1022 rdev->pm.dpm.power_control = true; in r600_parse_extended_power_table()
1024 rdev->pm.dpm.power_control = false; in r600_parse_extended_power_table()
1025 rdev->pm.dpm.tdp_adjustment = 0; in r600_parse_extended_power_table()
1026 rdev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold); in r600_parse_extended_power_table()
1027 rdev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage); in r600_parse_extended_power_table()
1028 rdev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope); in r600_parse_extended_power_table()
1036 rdev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL); in r600_parse_extended_power_table()
1037 if (!rdev->pm.dpm.dyn_state.cac_leakage_table.entries) { in r600_parse_extended_power_table()
1038 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1043 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in r600_parse_extended_power_table()
1044 rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 = in r600_parse_extended_power_table()
1046 rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 = in r600_parse_extended_power_table()
1048 rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 = in r600_parse_extended_power_table()
1051 rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = in r600_parse_extended_power_table()
1053 rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage = in r600_parse_extended_power_table()
1059 rdev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; in r600_parse_extended_power_table()
1090 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries = in r600_parse_extended_power_table()
1092 if (!rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) { in r600_parse_extended_power_table()
1093 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1096 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count = in r600_parse_extended_power_table()
1104 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in r600_parse_extended_power_table()
1106 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = in r600_parse_extended_power_table()
1108 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = in r600_parse_extended_power_table()
1119 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()
1121 rdev->pm.dpm.vce_states[i].ecclk = in r600_parse_extended_power_table()
1123 rdev->pm.dpm.vce_states[i].clk_idx = in r600_parse_extended_power_table()
1125 rdev->pm.dpm.vce_states[i].pstate = in r600_parse_extended_power_table()
1144 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = in r600_parse_extended_power_table()
1146 if (!rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) { in r600_parse_extended_power_table()
1147 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1150 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = in r600_parse_extended_power_table()
1157 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = in r600_parse_extended_power_table()
1159 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = in r600_parse_extended_power_table()
1161 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = in r600_parse_extended_power_table()
1176 rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries = in r600_parse_extended_power_table()
1178 if (!rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) { in r600_parse_extended_power_table()
1179 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1182 rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count = in r600_parse_extended_power_table()
1186 rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk = in r600_parse_extended_power_table()
1188 rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = in r600_parse_extended_power_table()
1199 rdev->pm.dpm.dyn_state.ppm_table = in r600_parse_extended_power_table()
1201 if (!rdev->pm.dpm.dyn_state.ppm_table) { in r600_parse_extended_power_table()
1202 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1205 rdev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign; in r600_parse_extended_power_table()
1206 rdev->pm.dpm.dyn_state.ppm_table->cpu_core_number = in r600_parse_extended_power_table()
1208 rdev->pm.dpm.dyn_state.ppm_table->platform_tdp = in r600_parse_extended_power_table()
1210 rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp = in r600_parse_extended_power_table()
1212 rdev->pm.dpm.dyn_state.ppm_table->platform_tdc = in r600_parse_extended_power_table()
1214 rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc = in r600_parse_extended_power_table()
1216 rdev->pm.dpm.dyn_state.ppm_table->apu_tdp = in r600_parse_extended_power_table()
1218 rdev->pm.dpm.dyn_state.ppm_table->dgpu_tdp = in r600_parse_extended_power_table()
1220 rdev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power = in r600_parse_extended_power_table()
1222 rdev->pm.dpm.dyn_state.ppm_table->tj_max = in r600_parse_extended_power_table()
1234 rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries = in r600_parse_extended_power_table()
1236 if (!rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) { in r600_parse_extended_power_table()
1237 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1240 rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count = in r600_parse_extended_power_table()
1244 rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk = in r600_parse_extended_power_table()
1246 rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = in r600_parse_extended_power_table()
1257 rdev->pm.dpm.dyn_state.cac_tdp_table = in r600_parse_extended_power_table()
1259 if (!rdev->pm.dpm.dyn_state.cac_tdp_table) { in r600_parse_extended_power_table()
1260 r600_free_extended_power_table(rdev); in r600_parse_extended_power_table()
1267 rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = in r600_parse_extended_power_table()
1274 rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255; in r600_parse_extended_power_table()
1277 rdev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP); in r600_parse_extended_power_table()
1278 rdev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp = in r600_parse_extended_power_table()
1280 rdev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC); in r600_parse_extended_power_table()
1281 rdev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit = in r600_parse_extended_power_table()
1283 rdev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit = in r600_parse_extended_power_table()
1285 rdev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage = in r600_parse_extended_power_table()
1287 rdev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage = in r600_parse_extended_power_table()
1295 void r600_free_extended_power_table(struct radeon_device *rdev) in r600_free_extended_power_table() argument
1297 struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state; in r600_free_extended_power_table()
1313 enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev, in r600_get_pcie_gen_support() argument
1336 u16 r600_get_pcie_lane_support(struct radeon_device *rdev, in r600_get_pcie_lane_support() argument