339 	struct radeon_ib ib;  in r600_dma_ib_test()  local
353 	r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);  in r600_dma_ib_test()
359 	ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1);  in r600_dma_ib_test()
360 	ib.ptr[1] = lower_32_bits(gpu_addr);  in r600_dma_ib_test()
361 	ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff;  in r600_dma_ib_test()
362 	ib.ptr[3] = 0xDEADBEEF;  in r600_dma_ib_test()
363 	ib.length_dw = 4;  in r600_dma_ib_test()
365 	r = radeon_ib_schedule(rdev, &ib, NULL, false);  in r600_dma_ib_test()
367 		radeon_ib_free(rdev, &ib);  in r600_dma_ib_test()
371 	r = radeon_fence_wait(ib.fence, false);  in r600_dma_ib_test()
383 		DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);  in r600_dma_ib_test()
388 	radeon_ib_free(rdev, &ib);  in r600_dma_ib_test()
400 void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)  in r600_dma_ring_ib_execute()  argument
402 	struct radeon_ring *ring = &rdev->ring[ib->ring];  in r600_dma_ring_ib_execute()
421 	radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));  in r600_dma_ring_ib_execute()
422 	radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF));  in r600_dma_ring_ib_execute()