1678 		ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in r600_packet3_check()
1719 		ib[idx+1] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
1771 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
1815 			ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in r600_packet3_check()
1845 			ib[idx+3] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
1883 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
1905 		ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in r600_packet3_check()
2012 						    (upper_32_bits(offset64) & 0xff);  in r600_packet3_check()
2154 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
2173 			ib[idx+4] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
2202 		ib[idx+1] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
2227 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
2251 			ib[idx+4] = upper_32_bits(offset) & 0xff;  in r600_packet3_check()
2513 				ib[idx+2] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2545 					ib[idx+6] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2551 					ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2567 					ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2568 					ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2578 					ib[idx+3] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in r600_dma_cs_parse()
2579 					ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) & 0xff) << 16;  in r600_dma_cs_parse()
2612 			ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) << 16) & 0x00ff0000;  in r600_dma_cs_parse()