1086 		track->vgt_strmout_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1213 			track->cb_color_frag_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1244 			track->cb_color_tile_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1284 		track->cb_color_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1297 		track->db_bo = reloc->robj;  in r600_cs_check_reg()
1310 		track->htile_bo = reloc->robj;  in r600_cs_check_reg()
1808 			if ((tmp + size) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
1810 					 tmp + size, radeon_bo_size(reloc->robj));  in r600_packet3_check()
1838 			if ((tmp + size) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
1840 					 tmp + size, radeon_bo_size(reloc->robj));  in r600_packet3_check()
1972 				texture = reloc->robj;  in r600_packet3_check()
1980 				mipmap = reloc->robj;  in r600_packet3_check()
2002 				if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2005 						 size + offset, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2006 					ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj) - offset;  in r600_packet3_check()
2102 			if (reloc->robj != track->vgt_strmout_bo[idx_value]) {  in r600_packet3_check()
2114 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2116 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2147 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2149 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2166 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2168 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2195 		if ((offset + 8) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2197 				  offset + 8, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2220 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2222 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2244 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2246 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2516 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2518 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()
2583 			if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {  in r600_dma_cs_parse()
2585 					 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));  in r600_dma_cs_parse()
2588 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2590 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()
2606 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2608 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()