Lines Matching refs:r600_max_gprs
760 dev_priv->r600_max_gprs = 256; in r600_gfx_init()
776 dev_priv->r600_max_gprs = 128; in r600_gfx_init()
794 dev_priv->r600_max_gprs = 128; in r600_gfx_init()
809 dev_priv->r600_max_gprs = 192; in r600_gfx_init()
1385 dev_priv->r600_max_gprs = 256; in r700_gfx_init()
1405 dev_priv->r600_max_gprs = 128; in r700_gfx_init()
1429 dev_priv->r600_max_gprs = 256; in r700_gfx_init()
1449 dev_priv->r600_max_gprs = 256; in r700_gfx_init()
1676 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1, (R600_NUM_PS_GPRS((dev_priv->r600_max_gprs * 24)/64) | in r700_gfx_init()
1677 R600_NUM_VS_GPRS((dev_priv->r600_max_gprs * 24)/64) | in r700_gfx_init()
1678 R600_NUM_CLAUSE_TEMP_GPRS(((dev_priv->r600_max_gprs * 24)/64)/2))); in r700_gfx_init()
1680 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2, (R600_NUM_GS_GPRS((dev_priv->r600_max_gprs * 7)/64) | in r700_gfx_init()
1681 R600_NUM_ES_GPRS((dev_priv->r600_max_gprs * 7)/64))); in r700_gfx_init()
1698 sq_dyn_gpr_size_simd_ab_0 = (R700_SIMDA_RING0((dev_priv->r600_max_gprs * 38)/64) | in r700_gfx_init()
1699 R700_SIMDA_RING1((dev_priv->r600_max_gprs * 38)/64) | in r700_gfx_init()
1700 R700_SIMDB_RING0((dev_priv->r600_max_gprs * 38)/64) | in r700_gfx_init()
1701 R700_SIMDB_RING1((dev_priv->r600_max_gprs * 38)/64)); in r700_gfx_init()