Lines Matching refs:gpu_addr
1336 WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12); in r600_mc_program()
1517 RADEON_GEM_DOMAIN_VRAM, &rdev->vram_scratch.gpu_addr); in r600_vram_scratch_init()
2746 ((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC)); in r600_cp_resume()
2747 WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); in r600_cp_resume()
2748 WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); in r600_cp_resume()
2760 WREG32(CP_RB_BASE, ring->gpu_addr >> 8); in r600_cp_resume()
2875 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_fence_ring_emit()
2928 uint64_t addr = semaphore->gpu_addr; in r600_semaphore_ring_emit()
3351 (ib->gpu_addr & 0xFFFFFFFC)); in r600_ring_ib_execute()
3352 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); in r600_ring_ib_execute()
3451 &rdev->ih.gpu_addr); in r600_ih_ring_alloc()
3651 WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); in r600_irq_init()
3661 WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8); in r600_irq_init()
3672 WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC); in r600_irq_init()
3673 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); in r600_irq_init()