Lines Matching refs:mc
98 rdev->mc.vram_width = 128; in r520_vram_get_type()
99 rdev->mc.vram_is_ddr = true; in r520_vram_get_type()
103 rdev->mc.vram_width = 32; in r520_vram_get_type()
106 rdev->mc.vram_width = 64; in r520_vram_get_type()
109 rdev->mc.vram_width = 128; in r520_vram_get_type()
112 rdev->mc.vram_width = 256; in r520_vram_get_type()
115 rdev->mc.vram_width = 128; in r520_vram_get_type()
119 rdev->mc.vram_width *= 2; in r520_vram_get_type()
127 radeon_vram_location(rdev, &rdev->mc, 0); in r520_mc_init()
128 rdev->mc.gtt_base_align = 0; in r520_mc_init()
130 radeon_gtt_location(rdev, &rdev->mc); in r520_mc_init()
145 WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size); in r520_mc_program()
148 S_000004_MC_FB_START(rdev->mc.vram_start >> 16) | in r520_mc_program()
149 S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16)); in r520_mc_program()
151 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in r520_mc_program()
154 S_000005_MC_AGP_START(rdev->mc.gtt_start >> 16) | in r520_mc_program()
155 S_000005_MC_AGP_TOP(rdev->mc.gtt_end >> 16)); in r520_mc_program()
156 WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); in r520_mc_program()
158 S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); in r520_mc_program()