Lines Matching refs:levels
1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1708 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1711 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state()
1713 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1715 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in ni_populate_smc_initial_state()
1717 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = in ni_populate_smc_initial_state()
1719 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in ni_populate_smc_initial_state()
1721 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in ni_populate_smc_initial_state()
1723 table->initialState.levels[0].sclk.sclk_value = in ni_populate_smc_initial_state()
1725 table->initialState.levels[0].arbRefreshState = in ni_populate_smc_initial_state()
1728 table->initialState.levels[0].ACIndex = 0; in ni_populate_smc_initial_state()
1732 &table->initialState.levels[0].vddc); in ni_populate_smc_initial_state()
1737 &table->initialState.levels[0].vddc, in ni_populate_smc_initial_state()
1741 table->initialState.levels[0].vddc.index, in ni_populate_smc_initial_state()
1742 &table->initialState.levels[0].std_vddc); in ni_populate_smc_initial_state()
1749 &table->initialState.levels[0].vddci); in ni_populate_smc_initial_state()
1751 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in ni_populate_smc_initial_state()
1754 table->initialState.levels[0].aT = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1756 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_initial_state()
1759 table->initialState.levels[0].gen2PCIE = 1; in ni_populate_smc_initial_state()
1761 table->initialState.levels[0].gen2PCIE = 0; in ni_populate_smc_initial_state()
1764 table->initialState.levels[0].strobeMode = in ni_populate_smc_initial_state()
1769 … table->initialState.levels[0].mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG; in ni_populate_smc_initial_state()
1771 table->initialState.levels[0].mcFlags = 0; in ni_populate_smc_initial_state()
1778 table->initialState.levels[0].dpm2.MaxPS = 0; in ni_populate_smc_initial_state()
1779 table->initialState.levels[0].dpm2.NearTDPDec = 0; in ni_populate_smc_initial_state()
1780 table->initialState.levels[0].dpm2.AboveSafeInc = 0; in ni_populate_smc_initial_state()
1781 table->initialState.levels[0].dpm2.BelowSafeInc = 0; in ni_populate_smc_initial_state()
1784 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1787 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1818 pi->acpi_vddc, &table->ACPIState.levels[0].vddc); in ni_populate_smc_acpi_state()
1823 &table->ACPIState.levels[0].vddc, &std_vddc); in ni_populate_smc_acpi_state()
1826 table->ACPIState.levels[0].vddc.index, in ni_populate_smc_acpi_state()
1827 &table->ACPIState.levels[0].std_vddc); in ni_populate_smc_acpi_state()
1832 table->ACPIState.levels[0].gen2PCIE = 1; in ni_populate_smc_acpi_state()
1834 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1836 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1842 &table->ACPIState.levels[0].vddc); in ni_populate_smc_acpi_state()
1847 &table->ACPIState.levels[0].vddc, in ni_populate_smc_acpi_state()
1851 table->ACPIState.levels[0].vddc.index, in ni_populate_smc_acpi_state()
1852 &table->ACPIState.levels[0].std_vddc); in ni_populate_smc_acpi_state()
1854 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1862 &table->ACPIState.levels[0].vddci); in ni_populate_smc_acpi_state()
1905 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in ni_populate_smc_acpi_state()
1906 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in ni_populate_smc_acpi_state()
1907 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in ni_populate_smc_acpi_state()
1908 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_smc_acpi_state()
1909 table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in ni_populate_smc_acpi_state()
1910 table->ACPIState.levels[0].mclk.vDLL_CNTL = cpu_to_be32(dll_cntl); in ni_populate_smc_acpi_state()
1912 table->ACPIState.levels[0].mclk.mclk_value = 0; in ni_populate_smc_acpi_state()
1914 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in ni_populate_smc_acpi_state()
1915 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in ni_populate_smc_acpi_state()
1916 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in ni_populate_smc_acpi_state()
1917 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4); in ni_populate_smc_acpi_state()
1919 table->ACPIState.levels[0].sclk.sclk_value = 0; in ni_populate_smc_acpi_state()
1921 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in ni_populate_smc_acpi_state()
1924 table->ACPIState.levels[0].ACIndex = 1; in ni_populate_smc_acpi_state()
1926 table->ACPIState.levels[0].dpm2.MaxPS = 0; in ni_populate_smc_acpi_state()
1927 table->ACPIState.levels[0].dpm2.NearTDPDec = 0; in ni_populate_smc_acpi_state()
1928 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0; in ni_populate_smc_acpi_state()
1929 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0; in ni_populate_smc_acpi_state()
1932 table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in ni_populate_smc_acpi_state()
1935 table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in ni_populate_smc_acpi_state()
2303 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()
2305 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()
2407 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2411 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()
2436 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()
2438 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2444 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2495 smc_state->levels[0].dpm2.MaxPS = 0; in ni_populate_power_containment_values()
2496 smc_state->levels[0].dpm2.NearTDPDec = 0; in ni_populate_power_containment_values()
2497 smc_state->levels[0].dpm2.AboveSafeInc = 0; in ni_populate_power_containment_values()
2498 smc_state->levels[0].dpm2.BelowSafeInc = 0; in ni_populate_power_containment_values()
2499 smc_state->levels[0].stateFlags |= power_boost_limit ? PPSMC_STATEFLAG_POWERBOOST : 0; in ni_populate_power_containment_values()
2523 smc_state->levels[i].dpm2.MaxPS = in ni_populate_power_containment_values()
2525 smc_state->levels[i].dpm2.NearTDPDec = NISLANDS_DPM2_NEAR_TDP_DEC; in ni_populate_power_containment_values()
2526 smc_state->levels[i].dpm2.AboveSafeInc = NISLANDS_DPM2_ABOVE_SAFE_INC; in ni_populate_power_containment_values()
2527 smc_state->levels[i].dpm2.BelowSafeInc = NISLANDS_DPM2_BELOW_SAFE_INC; in ni_populate_power_containment_values()
2528 smc_state->levels[i].stateFlags |= in ni_populate_power_containment_values()
2587 smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle); in ni_populate_sq_ramping_values()
2588 smc_state->levels[i].SQPowerThrottle_2 = cpu_to_be32(sq_power_throttle2); in ni_populate_sq_ramping_values()
2644 &smc_state->levels[i]); in ni_convert_power_state_to_smc()
2645 smc_state->levels[i].arbRefreshState = in ni_convert_power_state_to_smc()
2652 smc_state->levels[i].displayWatermark = in ni_convert_power_state_to_smc()
2656 smc_state->levels[i].displayWatermark = (i < 2) ? in ni_convert_power_state_to_smc()
2660 smc_state->levels[i].ACIndex = NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i; in ni_convert_power_state_to_smc()
2662 smc_state->levels[i].ACIndex = 0; in ni_convert_power_state_to_smc()