Lines Matching refs:radeon_ring_write
1417 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); in cayman_fence_ring_emit()
1418 radeon_ring_write(ring, PACKET3_ENGINE_ME | cp_coher_cntl); in cayman_fence_ring_emit()
1419 radeon_ring_write(ring, 0xFFFFFFFF); in cayman_fence_ring_emit()
1420 radeon_ring_write(ring, 0); in cayman_fence_ring_emit()
1421 radeon_ring_write(ring, 10); /* poll interval */ in cayman_fence_ring_emit()
1423 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); in cayman_fence_ring_emit()
1424 radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_EVENT_TS) | EVENT_INDEX(5)); in cayman_fence_ring_emit()
1425 radeon_ring_write(ring, lower_32_bits(addr)); in cayman_fence_ring_emit()
1426 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); in cayman_fence_ring_emit()
1427 radeon_ring_write(ring, fence->seq); in cayman_fence_ring_emit()
1428 radeon_ring_write(ring, 0); in cayman_fence_ring_emit()
1439 radeon_ring_write(ring, PACKET3(PACKET3_MODE_CONTROL, 0)); in cayman_ring_ib_execute()
1440 radeon_ring_write(ring, 1); in cayman_ring_ib_execute()
1444 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); in cayman_ring_ib_execute()
1445 radeon_ring_write(ring, ((ring->rptr_save_reg - in cayman_ring_ib_execute()
1447 radeon_ring_write(ring, next_rptr); in cayman_ring_ib_execute()
1450 radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); in cayman_ring_ib_execute()
1451 radeon_ring_write(ring, in cayman_ring_ib_execute()
1456 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); in cayman_ring_ib_execute()
1457 radeon_ring_write(ring, ib->length_dw | (vm_id << 24)); in cayman_ring_ib_execute()
1460 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); in cayman_ring_ib_execute()
1461 radeon_ring_write(ring, PACKET3_ENGINE_ME | cp_coher_cntl); in cayman_ring_ib_execute()
1462 radeon_ring_write(ring, 0xFFFFFFFF); in cayman_ring_ib_execute()
1463 radeon_ring_write(ring, 0); in cayman_ring_ib_execute()
1464 radeon_ring_write(ring, (vm_id << 24) | 10); /* poll interval */ in cayman_ring_ib_execute()
1566 radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); in cayman_cp_start()
1567 radeon_ring_write(ring, 0x1); in cayman_cp_start()
1568 radeon_ring_write(ring, 0x0); in cayman_cp_start()
1569 radeon_ring_write(ring, rdev->config.cayman.max_hw_contexts - 1); in cayman_cp_start()
1570 radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); in cayman_cp_start()
1571 radeon_ring_write(ring, 0); in cayman_cp_start()
1572 radeon_ring_write(ring, 0); in cayman_cp_start()
1584 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cayman_cp_start()
1585 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cayman_cp_start()
1588 radeon_ring_write(ring, cayman_default_state[i]); in cayman_cp_start()
1590 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cayman_cp_start()
1591 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
1594 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in cayman_cp_start()
1595 radeon_ring_write(ring, 0); in cayman_cp_start()
1598 radeon_ring_write(ring, 0xc0026f00); in cayman_cp_start()
1599 radeon_ring_write(ring, 0x00000000); in cayman_cp_start()
1600 radeon_ring_write(ring, 0x00000000); in cayman_cp_start()
1601 radeon_ring_write(ring, 0x00000000); in cayman_cp_start()
1604 radeon_ring_write(ring, 0xc0036f00); in cayman_cp_start()
1605 radeon_ring_write(ring, 0x00000bc4); in cayman_cp_start()
1606 radeon_ring_write(ring, 0xffffffff); in cayman_cp_start()
1607 radeon_ring_write(ring, 0xffffffff); in cayman_cp_start()
1608 radeon_ring_write(ring, 0xffffffff); in cayman_cp_start()
1610 radeon_ring_write(ring, 0xc0026900); in cayman_cp_start()
1611 radeon_ring_write(ring, 0x00000316); in cayman_cp_start()
1612 radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ in cayman_cp_start()
1613 radeon_ring_write(ring, 0x00000010); /* */ in cayman_cp_start()
2606 radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2), 0)); in cayman_vm_flush()
2607 radeon_ring_write(ring, pd_addr >> 12); in cayman_vm_flush()
2610 radeon_ring_write(ring, PACKET0(HDP_MEM_COHERENCY_FLUSH_CNTL, 0)); in cayman_vm_flush()
2611 radeon_ring_write(ring, 0x1); in cayman_vm_flush()
2614 radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); in cayman_vm_flush()
2615 radeon_ring_write(ring, 1 << vm_id); in cayman_vm_flush()
2618 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in cayman_vm_flush()
2619 radeon_ring_write(ring, (WAIT_REG_MEM_FUNCTION(0) | /* always */ in cayman_vm_flush()
2621 radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); in cayman_vm_flush()
2622 radeon_ring_write(ring, 0); in cayman_vm_flush()
2623 radeon_ring_write(ring, 0); /* ref */ in cayman_vm_flush()
2624 radeon_ring_write(ring, 0); /* mask */ in cayman_vm_flush()
2625 radeon_ring_write(ring, 0x20); /* poll interval */ in cayman_vm_flush()
2628 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in cayman_vm_flush()
2629 radeon_ring_write(ring, 0x0); in cayman_vm_flush()