Lines Matching refs:robj
1222 track->db_z_read_bo = reloc->robj; in evergreen_cs_handle_reg()
1234 track->db_z_write_bo = reloc->robj; in evergreen_cs_handle_reg()
1246 track->db_s_read_bo = reloc->robj; in evergreen_cs_handle_reg()
1258 track->db_s_write_bo = reloc->robj; in evergreen_cs_handle_reg()
1282 track->vgt_strmout_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1505 track->cb_color_fmask_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1522 track->cb_color_cmask_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1563 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1579 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1591 track->htile_bo = reloc->robj; in evergreen_cs_handle_reg()
2022 track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj); in evergreen_packet3_check()
2159 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2161 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2197 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2199 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2370 texture = reloc->robj; in evergreen_packet3_check()
2391 mipmap = reloc->robj; in evergreen_packet3_check()
2411 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2414 ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset; in evergreen_packet3_check()
2493 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2495 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2512 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2514 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2541 if ((offset + 8) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2543 offset + 8, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2566 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2568 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2593 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2595 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2796 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2798 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2821 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2823 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2826 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2828 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2861 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2863 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2866 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2868 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2880 if ((src_offset + count) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2882 src_offset + count, radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2885 if ((dst_offset + count) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2887 dst_offset + count, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2924 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2926 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2929 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2931 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2934 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
2936 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
2964 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2966 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2969 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2971 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2974 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
2976 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3026 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3028 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3031 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3033 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3036 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3038 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3072 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3074 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3077 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3079 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3113 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3115 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3118 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3120 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3123 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3125 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3147 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3149 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()