1295 	u32 tmp = 0;  in dce4_program_fmt()  local
1665 	u32 tmp;  in evergreen_pm_prepare()  local
1690 	u32 tmp;  in evergreen_pm_finish()  local
1759 	u32 tmp;  in evergreen_hpd_set_polarity()  local
1829 	u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) |  in evergreen_hpd_init()  local
1922 	u32 tmp, buffer_alloc, i;  in evergreen_line_buffer_adjust()  local
2010 	u32 tmp = RREG32(MC_SHARED_CHMAP);  in evergreen_get_number_of_dram_channels()  local
2266 	u32 tmp, arb_control3;  in evergreen_program_watermarks()  local
2456 	u32 tmp;  in evergreen_mc_wait_for_idle()  local
2474 	u32 tmp;  in evergreen_pcie_gart_tlb_flush()  local
2496 	u32 tmp;  in evergreen_pcie_gart_enable()  local
2554 	u32 tmp;  in evergreen_pcie_gart_disable()  local
2587 	u32 tmp;  in evergreen_agp_enable()  local
2754 	u32 crtc_enabled, tmp, frame_count, blackout;  in evergreen_mc_stop()  local
2852 	u32 tmp, frame_count;  in evergreen_mc_resume()  local
2942 	u32 tmp;  in evergreen_mc_program()  local
3155 	u32 tmp;  in evergreen_cp_resume()  local
3239 	u32 hdp_host_path_cntl, tmp;  in evergreen_gpu_init()  local
3800 	u32 tmp;  in evergreen_mc_init()  local
3889 	u32 i, j, tmp;  in evergreen_is_display_hung()  local
3917 	u32 tmp;  in evergreen_gpu_check_soft_reset()  local
3987 	u32 tmp;  in evergreen_gpu_soft_reset()  local
4100 	u32 tmp, i;  in evergreen_gpu_pci_config_reset()  local
4481 			u32 tmp = (RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0xffff0000) >> 16;  in evergreen_rlc_resume()  local
4543 	u32 tmp;  in evergreen_disable_interrupt_state()  local
4832 	u32 tmp;  in evergreen_irq_ack()  local
5012 	u32 wptr, tmp;  in evergreen_get_ih_wptr()  local