52 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_enable_bif_dynamic_pcie_gen2()  local
59 			if (!pi->boot_in_gen2) {  in cypress_enable_bif_dynamic_pcie_gen2()
76 		if (!pi->boot_in_gen2) {  in cypress_enable_bif_dynamic_pcie_gen2()
100 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);
102 	if (pi->gfx_clock_gating) {
174 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_mg_clock_gating_enable()  local
194 		if (pi->mgcgtssm)  in cypress_mg_clock_gating_enable()
215 		if (pi->mgcgtssm)  in cypress_mg_clock_gating_enable()
223 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_enable_spread_spectrum()  local
226 		if (pi->sclk_ss)  in cypress_enable_spread_spectrum()
229 		if (pi->mclk_ss)  in cypress_enable_spread_spectrum()
330 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_advertise_gen2_capability()  local
341 		pi->pcie_gen2 = true;  in cypress_advertise_gen2_capability()
343 		pi->pcie_gen2 = false;  in cypress_advertise_gen2_capability()
345 	if (!pi->pcie_gen2)  in cypress_advertise_gen2_capability()
425 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_strobe_mode_settings()  local
429 	if (pi->mem_gddr5) {  in cypress_get_strobe_mode_settings()
430 		if (mclk <= pi->mclk_strobe_mode_threshold)  in cypress_get_strobe_mode_settings()
478 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mclk_value()  local
481 		pi->clk_regs.rv770.mpll_ad_func_cntl;  in cypress_populate_mclk_value()
483 		pi->clk_regs.rv770.mpll_ad_func_cntl_2;  in cypress_populate_mclk_value()
485 		pi->clk_regs.rv770.mpll_dq_func_cntl;  in cypress_populate_mclk_value()
487 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;  in cypress_populate_mclk_value()
489 		pi->clk_regs.rv770.mclk_pwrmgt_cntl;  in cypress_populate_mclk_value()
491 		pi->clk_regs.rv770.dll_cntl;  in cypress_populate_mclk_value()
492 	u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1;  in cypress_populate_mclk_value()
493 	u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2;  in cypress_populate_mclk_value()
530 	if (pi->mem_gddr5) {  in cypress_populate_mclk_value()
553 	if (pi->mclk_ss) {  in cypress_populate_mclk_value()
573 	dll_speed = rv740_get_dll_speed(pi->mem_gddr5,  in cypress_populate_mclk_value()
655 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mvdd_value()  local
658 	if (!pi->mvdd_control) {  in cypress_populate_mvdd_value()
664 	if (mclk <= pi->mvdd_split_frequency) {  in cypress_populate_mvdd_value()
680 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_convert_power_level_to_smc()  local
685 	level->gen2PCIE = pi->pcie_gen2 ?  in cypress_convert_power_level_to_smc()
696 	if (pi->mclk_stutter_mode_threshold &&  in cypress_convert_power_level_to_smc()
697 	    (pl->mclk <= pi->mclk_stutter_mode_threshold) &&  in cypress_convert_power_level_to_smc()
706 	if (pi->mem_gddr5) {  in cypress_convert_power_level_to_smc()
707 		if (pl->mclk > pi->mclk_edc_enable_threshold)  in cypress_convert_power_level_to_smc()
869 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_upload_sw_state()  local
870 	u16 address = pi->state_table_start +  in cypress_upload_sw_state()
881 				    pi->sram_end);  in cypress_upload_sw_state()
887 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_upload_mc_reg_table()  local
900 				       pi->sram_end);  in cypress_upload_mc_reg_table()
906 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_calculate_burst_time()  local
907 	u32 multiplier = pi->mem_gddr5 ? 1 : 2;  in cypress_calculate_burst_time()
1072 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_initialize_mc_reg_table()  local
1078 					       pi->mem_gddr5,  in cypress_initialize_mc_reg_table()
1239 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_initial_state()  local
1244 		cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl);  in cypress_populate_smc_initial_state()
1246 		cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2);  in cypress_populate_smc_initial_state()
1248 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl);  in cypress_populate_smc_initial_state()
1250 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);  in cypress_populate_smc_initial_state()
1252 		cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);  in cypress_populate_smc_initial_state()
1254 		cpu_to_be32(pi->clk_regs.rv770.dll_cntl);  in cypress_populate_smc_initial_state()
1257 		cpu_to_be32(pi->clk_regs.rv770.mpll_ss1);  in cypress_populate_smc_initial_state()
1259 		cpu_to_be32(pi->clk_regs.rv770.mpll_ss2);  in cypress_populate_smc_initial_state()
1265 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl);  in cypress_populate_smc_initial_state()
1267 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2);  in cypress_populate_smc_initial_state()
1269 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3);  in cypress_populate_smc_initial_state()
1271 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum);  in cypress_populate_smc_initial_state()
1273 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);  in cypress_populate_smc_initial_state()
1299 	table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);  in cypress_populate_smc_initial_state()
1302 	if (pi->boot_in_gen2)  in cypress_populate_smc_initial_state()
1311 	if (pi->mem_gddr5) {  in cypress_populate_smc_initial_state()
1316 		if (initial_state->low.mclk > pi->mclk_edc_enable_threshold)  in cypress_populate_smc_initial_state()
1333 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_acpi_state()  local
1336 		pi->clk_regs.rv770.mpll_ad_func_cntl;  in cypress_populate_smc_acpi_state()
1338 		pi->clk_regs.rv770.mpll_ad_func_cntl_2;  in cypress_populate_smc_acpi_state()
1340 		pi->clk_regs.rv770.mpll_dq_func_cntl;  in cypress_populate_smc_acpi_state()
1342 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;  in cypress_populate_smc_acpi_state()
1344 		pi->clk_regs.rv770.cg_spll_func_cntl;  in cypress_populate_smc_acpi_state()
1346 		pi->clk_regs.rv770.cg_spll_func_cntl_2;  in cypress_populate_smc_acpi_state()
1348 		pi->clk_regs.rv770.cg_spll_func_cntl_3;  in cypress_populate_smc_acpi_state()
1350 		pi->clk_regs.rv770.mclk_pwrmgt_cntl;  in cypress_populate_smc_acpi_state()
1352 		pi->clk_regs.rv770.dll_cntl;  in cypress_populate_smc_acpi_state()
1358 	if (pi->acpi_vddc) {  in cypress_populate_smc_acpi_state()
1361 					       pi->acpi_vddc,  in cypress_populate_smc_acpi_state()
1363 		if (pi->pcie_gen2) {  in cypress_populate_smc_acpi_state()
1364 			if (pi->acpi_pcie_gen2)  in cypress_populate_smc_acpi_state()
1370 		if (pi->acpi_pcie_gen2)  in cypress_populate_smc_acpi_state()
1377 					       pi->min_vddc_in_table,  in cypress_populate_smc_acpi_state()
1395 	if (pi->mem_gddr5)  in cypress_populate_smc_acpi_state()
1526 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_voltage_tables()  local
1540 			if (pi->max_vddc_in_table <=  in cypress_populate_smc_voltage_tables()
1572 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_mvdd_configuration()  local
1581 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1596 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1600 	pi->mvdd_split_frequency =  in cypress_get_mvdd_configuration()
1603 	if (pi->mvdd_split_frequency == 0) {  in cypress_get_mvdd_configuration()
1604 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1614 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_init_smc_table()  local
1615 	RV770_SMC_STATETABLE *table = &pi->smc_statetable;  in cypress_init_smc_table()
1644 	if (pi->mem_gddr5)  in cypress_init_smc_table()
1658 				       pi->state_table_start,  in cypress_init_smc_table()
1660 				       pi->sram_end);  in cypress_init_smc_table()
1666 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mc_reg_table()  local
1688 				       pi->sram_end);  in cypress_populate_mc_reg_table()
1693 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_table_locations()  local
1701 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1705 	pi->state_table_start = (u16)tmp;  in cypress_get_table_locations()
1710 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1714 	pi->soft_regs_start = (u16)tmp;  in cypress_get_table_locations()
1719 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1805 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_enable()  local
1810 	if (pi->gfx_clock_gating)  in cypress_dpm_enable()
1816 	if (pi->voltage_control) {  in cypress_dpm_enable()
1825 	if (pi->mvdd_control) {  in cypress_dpm_enable()
1845 	if (pi->dynamic_ss)  in cypress_dpm_enable()
1848 	if (pi->thermal_protection)  in cypress_dpm_enable()
1860 	if (pi->dynamic_pcie_gen2)  in cypress_dpm_enable()
1903 	if (pi->gfx_clock_gating)  in cypress_dpm_enable()
1906 	if (pi->mg_clock_gating)  in cypress_dpm_enable()
1916 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_disable()  local
1925 	if (pi->thermal_protection)  in cypress_dpm_disable()
1928 	if (pi->dynamic_pcie_gen2)  in cypress_dpm_disable()
1937 	if (pi->gfx_clock_gating)  in cypress_dpm_disable()
1940 	if (pi->mg_clock_gating)  in cypress_dpm_disable()
2023 	struct rv7xx_power_info *pi;  in cypress_dpm_init()  local
2032 	pi = &eg_pi->rv7xx;  in cypress_dpm_init()
2037 	pi->acpi_vddc = 0;  in cypress_dpm_init()
2039 	pi->min_vddc_in_table = 0;  in cypress_dpm_init()
2040 	pi->max_vddc_in_table = 0;  in cypress_dpm_init()
2058 		pi->ref_div = dividers.ref_div + 1;  in cypress_dpm_init()
2060 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in cypress_dpm_init()
2062 	pi->mclk_strobe_mode_threshold = 40000;  in cypress_dpm_init()
2063 	pi->mclk_edc_enable_threshold = 40000;  in cypress_dpm_init()
2066 	pi->rlp = RV770_RLP_DFLT;  in cypress_dpm_init()
2067 	pi->rmp = RV770_RMP_DFLT;  in cypress_dpm_init()
2068 	pi->lhp = RV770_LHP_DFLT;  in cypress_dpm_init()
2069 	pi->lmp = RV770_LMP_DFLT;  in cypress_dpm_init()
2071 	pi->voltage_control =  in cypress_dpm_init()
2074 	pi->mvdd_control =  in cypress_dpm_init()
2082 	pi->asi = RV770_ASI_DFLT;  in cypress_dpm_init()
2083 	pi->pasi = CYPRESS_HASI_DFLT;  in cypress_dpm_init()
2084 	pi->vrc = CYPRESS_VRC_DFLT;  in cypress_dpm_init()
2086 	pi->power_gating = false;  in cypress_dpm_init()
2090 		pi->gfx_clock_gating = false;  in cypress_dpm_init()
2092 		pi->gfx_clock_gating = true;  in cypress_dpm_init()
2094 	pi->mg_clock_gating = true;  in cypress_dpm_init()
2095 	pi->mgcgtssm = true;  in cypress_dpm_init()
2099 	pi->dynamic_pcie_gen2 = true;  in cypress_dpm_init()
2102 		pi->thermal_protection = true;  in cypress_dpm_init()
2104 		pi->thermal_protection = false;  in cypress_dpm_init()
2106 	pi->display_gap = true;  in cypress_dpm_init()
2109 		pi->dcodt = true;  in cypress_dpm_init()
2111 		pi->dcodt = false;  in cypress_dpm_init()
2113 	pi->ulps = true;  in cypress_dpm_init()
2135 	pi->mclk_stutter_mode_threshold = 0;  in cypress_dpm_init()
2137 	pi->sram_end = SMC_RAM_END;  in cypress_dpm_init()
2155 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_vblank_too_short()  local
2158 	u32 switch_limit = pi->mem_gddr5 ? 450 : 0;  in cypress_dpm_vblank_too_short()