Lines Matching refs:initialState

1243 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =  in cypress_populate_smc_initial_state()
1245 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1247 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = in cypress_populate_smc_initial_state()
1249 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1251 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = in cypress_populate_smc_initial_state()
1253 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = in cypress_populate_smc_initial_state()
1256 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = in cypress_populate_smc_initial_state()
1258 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = in cypress_populate_smc_initial_state()
1261 table->initialState.levels[0].mclk.mclk770.mclk_value = in cypress_populate_smc_initial_state()
1264 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in cypress_populate_smc_initial_state()
1266 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1268 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in cypress_populate_smc_initial_state()
1270 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in cypress_populate_smc_initial_state()
1272 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in cypress_populate_smc_initial_state()
1275 table->initialState.levels[0].sclk.sclk_value = in cypress_populate_smc_initial_state()
1278 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; in cypress_populate_smc_initial_state()
1280 table->initialState.levels[0].ACIndex = 0; in cypress_populate_smc_initial_state()
1285 &table->initialState.levels[0].vddc); in cypress_populate_smc_initial_state()
1291 &table->initialState.levels[0].vddci); in cypress_populate_smc_initial_state()
1294 &table->initialState.levels[0].mvdd); in cypress_populate_smc_initial_state()
1297 table->initialState.levels[0].aT = cpu_to_be32(a_t); in cypress_populate_smc_initial_state()
1299 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in cypress_populate_smc_initial_state()
1303 table->initialState.levels[0].gen2PCIE = 1; in cypress_populate_smc_initial_state()
1305 table->initialState.levels[0].gen2PCIE = 0; in cypress_populate_smc_initial_state()
1307 table->initialState.levels[0].gen2XSP = 1; in cypress_populate_smc_initial_state()
1309 table->initialState.levels[0].gen2XSP = 0; in cypress_populate_smc_initial_state()
1312 table->initialState.levels[0].strobeMode = in cypress_populate_smc_initial_state()
1317 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG; in cypress_populate_smc_initial_state()
1319 table->initialState.levels[0].mcFlags = 0; in cypress_populate_smc_initial_state()
1322 table->initialState.levels[1] = table->initialState.levels[0]; in cypress_populate_smc_initial_state()
1323 table->initialState.levels[2] = table->initialState.levels[0]; in cypress_populate_smc_initial_state()
1325 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_populate_smc_initial_state()
1354 table->ACPIState = table->initialState; in cypress_populate_smc_acpi_state()
1655 table->driverState = table->initialState; in cypress_init_smc_table()