Lines Matching refs:ring_size
4484 rb_bufsz = order_base_2(ring->ring_size / 8); in cik_cp_gfx_resume()
5076 order_base_2(rdev->ring[idx].ring_size / 8); in cik_cp_compute_resume()
7414 rb_bufsz = order_base_2(rdev->ih.ring_size / 4); in cik_irq_init()
8605 rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; in cik_startup()
8619 rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; in cik_startup()
8620 rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; in cik_startup()
8648 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, in cik_startup()
8656 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, in cik_startup()
8667 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, in cik_startup()
8678 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, in cik_startup()
8684 r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, in cik_startup()
8698 if (ring->ring_size) { in cik_startup()
8699 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, in cik_startup()
8710 if (ring->ring_size) in cik_startup()
8711 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, in cik_startup()
8715 if (ring->ring_size) in cik_startup()
8716 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, in cik_startup()